Transfer Modeling for 1T1R Crossbar Arrays with Line Resistances
Abstract Progress of neuromorphic computing and next-generation information storage technologies hinges on the development of emerging nonvolatile memory (eNVM) devices, which are typically organized employing the crossbar array architecture. To facilitate quantitative performance analysis of eNVM crossbar array architecture, this paper proposes a way to study the one-transistor-one-resistor (1T1R, R: eNVM devices) crossbar arrays based on matrix algebra method. The comparative analysis of 1T1R crossbar array modeling based on matrix algebra method and compact-model SPICE simulations verifies the accuracy of the proposed method, which can be directly used for static quantitative analysis and evaluation of 1T1R crossbar array performance. With the proposed method, the optimization of array operation schemes and current backflow issue are discussed. Our analysis indicates that the proposed method is capable of flexibly adjusting array parameters and consider the influence of line resistance on array operation, and can provide guidance for improving the sensing margin of the array through multi-parameter co-simulation. The proposed matrix algebra-based 1T1R crossbar array modeling method can bridge the gap between the accuracy and flexibility of the available methods.