scholarly journals Transfer Modeling for 1T1R Crossbar Arrays with Line Resistances

Author(s):  
Xin Zhang ◽  
Ying Zeng

Abstract Progress of neuromorphic computing and next-generation information storage technologies hinges on the development of emerging nonvolatile memory (eNVM) devices, which are typically organized employing the crossbar array architecture. To facilitate quantitative performance analysis of eNVM crossbar array architecture, this paper proposes a way to study the one-transistor-one-resistor (1T1R, R: eNVM devices) crossbar arrays based on matrix algebra method. The comparative analysis of 1T1R crossbar array modeling based on matrix algebra method and compact-model SPICE simulations verifies the accuracy of the proposed method, which can be directly used for static quantitative analysis and evaluation of 1T1R crossbar array performance. With the proposed method, the optimization of array operation schemes and current backflow issue are discussed. Our analysis indicates that the proposed method is capable of flexibly adjusting array parameters and consider the influence of line resistance on array operation, and can provide guidance for improving the sensing margin of the array through multi-parameter co-simulation. The proposed matrix algebra-based 1T1R crossbar array modeling method can bridge the gap between the accuracy and flexibility of the available methods.

Author(s):  
T. T. C. Ting
Keyword(s):  

We will present in this chapter some aspects of matrix algebra that are needed in this book. Most results presented here can be found in standard books on matrix algebra. Proofs are provided for those results that are either easily derived or not readily available elsewhere. For readers who have no knowledge of matrix algebra, this chapter is essential for the rest of the book. They may find the one-chapter treatment of matrix algebra in the book by Hildebrand (1954) helpful and informative. For readers who have some knowledge of matrix algebra this chapter can be skimmed or skipped altogether, depending on how familiar they are with the subject. If they want to find the proofs omitted in this chapter or want to devote more time on the subject, the books by Hohn (1965) and Pease (1965) are recommended. The notations employed in this chapter have no relations, in most cases, with the notations adopted in the rest of the book. This point should be kept in mind in referring back to this chapter.


2013 ◽  
Vol 347-350 ◽  
pp. 2993-2997
Author(s):  
Yue Li ◽  
Ran Liu

With the popularity and development of the network, the support of the high-performance computer technology becomes increasingly important as the huge information storage and the convenience of Information retrieval function of the internet that attracts more and more people join the netizens team. Therefore, I proposed an Information Processing Platform based on the high performance data mining in order to improve the Internet mass information intelligence parallel processing functions and the integrated development of the systems information storage, management, integration, intelligence processing, data mining and utilization. The propose of this system is to provide certain references and guidance for the technology implementation and realization of the high performance and high efficiency network massive Information Processing Platform as on the one hand, I have analyzed the key technology of the implementation of the platform, on the other hand briefly introduced the implementation of the RDIDC.


Sensors ◽  
2020 ◽  
Vol 20 (21) ◽  
pp. 6344
Author(s):  
Christopher Hakoda ◽  
Eric S. Davis ◽  
Cristian Pantea ◽  
Vamshi Krishna Chillara

A piezoelectric-based method for information storage is presented. It involves engineering the polarization profiles of multiple piezoelectric wafers to enhance/suppress specific electromechanical resonances. These enhanced/suppressed resonances can be used to represent multiple frequency-dependent bits, thus enabling multi-level information storage. This multi-level information storage is demonstrated by achieving three information states for a ternary encoding. Using the three information states, we present an approach to encode and decode information from a 2-by-3 array of piezoelectric wafers that we refer to as a concept Piezoelectric Quick Response (PQR) code. The scaling relation between the number of wafers used and the cumulative number of information states that can be achieved with the proposed methodology is briefly discussed. Potential applications of this methodology include tamper-evident devices, embedded product tags in manufacturing/inventory tracking, and additional layers of security with existing information storage technologies.


1995 ◽  
Author(s):  
Ivan Z. Indutnyi ◽  
Sergey A. Kostyukevych ◽  
Victor I. Minko ◽  
Peter E. Shepeljavi ◽  
Alexander V. Stronski

2015 ◽  
Vol 25 (18) ◽  
pp. 2630-2630 ◽  
Author(s):  
Liang Pan ◽  
Zhenghui Ji ◽  
Xiaohui Yi ◽  
Xiaojian Zhu ◽  
Xinxin Chen ◽  
...  

2015 ◽  
Vol 62 (11) ◽  
pp. 3490-3497 ◽  
Author(s):  
Leqi Zhang ◽  
Stefan Cosemans ◽  
Dirk J. Wouters ◽  
Guido Groeseneken ◽  
Malgorzata Jurczak ◽  
...  

2021 ◽  
Vol 21 (3) ◽  
pp. 1833-1844
Author(s):  
Kyojin Kim ◽  
Kamran Eshraghian ◽  
Hyunsoo Kang ◽  
Kyoungrok Cho

Nano memristor crossbar arrays, which can represent analog signals with smaller silicon areas, are popularly used to describe the node weights of the neural networks. The crossbar arrays provide high computational efficiency, as they can perform additions and multiplications at the same time at a cross-point. In this study, we propose a new approach for the memristor crossbar array architecture consisting of multi-weight nano memristors on each cross-point. As the proposed architecture can represent multiple integer-valued weights, it can enhance the precision of the weight coefficients in comparison with the existing memristor-based neural networks. This study presents a Radix-11 nano memristor crossbar array with weighted memristors; it validates the operations of the circuits, which use the arrays through circuit-level simulation. With the proposed Radix-11 approach, it is possible to represent eleven integer-valued weights. In addition, this study presents a neural network designed using the proposed Radix-11 weights, as an example of high-performance AI applications. The neural network implements a speech-keyword detection algorithm, and it was designed on a TensorFlow platform. The implemented keyword detection algorithm can recognize 35 Korean words with an inferencing accuracy of 95.45%, reducing the inferencing accuracy only by 2% when compared to the 97.53% accuracy of the real-valued weight case.


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