A Silicon BJT Active ESD Clamp Design in a Silicon Germanium HBT BiCMOS Technology

Author(s):  
Dolphin Abessolo-Bidzo ◽  
Peter Magnee ◽  
Pieter Van Dijk ◽  
Johan Donkers
2010 ◽  
Author(s):  
Leland Gilreath ◽  
Vipul Jain ◽  
Hsin-Cheng Yao ◽  
Le Zheng ◽  
Payam Heydari

2005 ◽  
Vol 15 (03) ◽  
pp. 477-495 ◽  
Author(s):  
SHANTHI PAVAN ◽  
MAURICE TARSIA ◽  
STEFFEN KUDSZUS ◽  
DAVID PRITZKAU

We present design considerations for high speed high swing differential modulator drivers in SiGe BiCMOS technology. Trade-offs between lumped and distributed designs, and linear and limiting amplifiers are examined. The design of a 6 V output modulator driver is discussed in detail. The driver features a unique bias generation and distribution circuit that enables low power-supply operation. Simulation results and measurements are given.


2003 ◽  
Vol 13 (01) ◽  
pp. 221-237
Author(s):  
KARL E. FRITZ ◽  
BARBARA A. RANDALL ◽  
GREGG J. FOKKEN ◽  
MICHAEL J. DEGERSTROM ◽  
MICHAEL J. LORSUNG ◽  
...  

Under the auspices of Defense Advanced Research Project Agency's Microsystems Technology Office (DARPA/MTO) Low Power Electronics Program, the Mayo Foundation Special Purpose Processor Development Group is exploring ways to reduce circuit power consumption, while maintaining or increasing functionality, for existing military systems. Applications presently being studied include all-digital radar receivers, electronic warfare receivers, and other types of digital signal processors. One of the integrated circuit technologies currently under investigation to support such military systems is the IBM Corporation silicon germanium (SiGe) BiCMOS process. In this paper, design methodology, simulations and test results from demonstration circuits developed for these applications and implemented in the IBM SiGe BiCMOS 5HP (50 GHz fT HBTs with 0.5 μm CMOS) and 7HP (120 GHz fT HBTs with 0.18 μm CMOS) technologies will be presented.


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