High Frequency Analysis and Optimization of Planar Spiral Inductors Used in Microelectronic Circuits

This paper deals with high frequency analysis of spiral inductors, used in microelectronics circuits, to optimize their configuration. Software developed, designed, and implemented by the authors for nano and micrometre spiral inductor high frequency analysis, named ABSIF, is presented in this paper. ABSIF determines the inductance, quality factor, and electrical parameters for square, hexagonal, octagonal, and circular spiral inductors and their configuration optimization for energy efficiency. ABSIF is a good tool for spiral inductor design optimization in high frequency applications and takes into account the imposed technological limits and/or the designers’ constraints. A set of spiral inductors are considered and analysed for high frequency values using ABSIF, and the results are presented in the paper. The validation of ABSIF was completed by comparing the results with those obtained using a similar commercial software, Sonnet LiteTM, which is dedicated to high frequency electromagnetic analysis.

Investigations about Al and Cu-Based Planar Spiral Inductors on Sapphire for GaN-Based RF Applications

Conventionally, Cu is preferred over Al to fabricate integrated inductors with higher quality factors on either silicon or sapphire substrates, profiting from its lower resistivity. However, after investigating and comparing these two kinds of metal multilayers in terms of fabrication process, electrical conductivity, in-depth profile analysis and performance of actual inductors, the Al-based metal multilayer exhibits competitive ability in fabricating thin-film inductors on sapphire compared to Cu-based multilayers. This is attributed to the degradation in electrical conductivity out of oxidation of Cu-based metal sublayers or forming alloys between them. Furthermore, in order to avoid complicated de-embedding procedures in the characterization of the on-chip inductors, a six-element equivalent physical model, which takes the parasitic effect of radio-frequency (RF) test structures into account, is proposed and validated by matching well with embedded measurement results.

Miniaturized bandpass filter based on double spiral stripline resonators

A new miniature monolithic bandpass filter, which can be manufactured using multilayer standard all-PCB technology, is presented. Each resonator in the filter is formed by metal spirals of the left and right wist inserted into each other, in which one pair of adjacent ends is grounded, and the other is free. Spiral inductors have the form of identical rectangular frames and are designed on dielectric substrates, located on a multilayer structure strictly under each other with alternating turns of the left and right spirals. The design of the filter based on such multilayer double-spiral resonators is both small in size, and highly selective, which is proved by the measured characteristics of the fourth order filter fabricated at seven dielectric layers of RO4350B material. The filter has the central frequency of the passband f0 = 60 MHz, and the fractional bandwidth Δf / f0 = 18%, while the size of the device is of the device are only 34 × 16.5 × 4.3 mm3 (0.007λ0 × 0.003λ0 × 0.001λ0, where λ0 is the wavelength at the center frequency f0). The filter has a wide stopband, which extends up to the frequency of 16f0 at a level of –38 dB.

Frequency-Compensated Bulk-Driven TIA Suitable for Low-Voltage Low-Power Applications

The importance of a transimpedance amplifier in an optical transceiver is very well known. In this paper, a novel CMOS design of the bulk-driven transimpedance amplifier (BD-TIA) is given where the bridge-shunt peaking-based frequency compensation technique is exploited to improve frequency response. A pre-existing active inductor has been used for the same. The electrical characteristics and functioning of this inductor simulator make it a suitable alternative to both floating and grounded spiral inductors. In order to verify the workability of the proposed circuit, it has been simulated with TSMC CMOS 0.18[Formula: see text][Formula: see text]m process parameters. The proposed circuit is useful in low-voltage low-power VLSI applications as it uses a single supply of 0.75[Formula: see text]V. The power consumption of BD-TIA is very low, being 0.37[Formula: see text]mW, because a standard MOSFET has been replaced by a bulk-driven MOSFET (BDMOS), while the 3-dB bandwidth is observed to be 4.5[Formula: see text]GHz. The mathematical investigation and small signal analysis show that the simulation results are in good agreement.