THE DEVICE FOR MULTIPLYING POLYNOMIALS MODULO WITH ANALYSIS OF TWO LEAST SIGNIFICANT BITS OF THE MULTIPLIER PER STEP

Although variety in hiding methods used to protect data and information transmitted via channels but still need more robustness and difficulty to improve protection level of the secret messages from hacking or attacking. Moreover, hiding several medias in one media to reduce the transmission time and band of channel is the important task and define as a gain channel. This calls to find other ways to be more complexity in detecting the secret message. Therefore, this paper proposes cryptography/steganography method to hide an audio/voice message (secret message) in two different cover medias: audio and video. This method is use least significant bits (LSB) algorithm combined with 4D grid multi-wing hyper-chaotic (GMWH) system. Shuffling of an audio using key generated by GMWH system and then hiding message using LSB algorithm will provide more difficulty of extracting the original audio by hackers or attackers. According to analyses of obtained results in the receiver using peak signal-to-noise ratio (PSNR)/mean square error (MSE) and sensitivity of encryption key, the proposed method has more security level and robustness. Finally, this work will provide extra security to the mixture base of crypto-steganographic methods.

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Statistical detection of data hidden in least significant bits of clipped images

Signal Processing ◽

10.1016/j.sigpro.2013.11.027 ◽

2014 ◽

Vol 98 ◽

pp. 263-274 ◽

Cited By ~ 9

Author(s):

Thanh Hai Thai ◽

Florent Retraint ◽

Rémi Cogranne

Keyword(s):

Statistical Detection ◽

Least Significant Bits

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An Extended-Counting Incremental Sigma–Delta ADC with Hardware-Reuse Technique

Journal of Circuits System and Computers ◽

10.1142/s0218126616500389 ◽

2016 ◽

Vol 25 (05) ◽

pp. 1650038

Author(s):

Xinji Zeng ◽

Jing Gao ◽

Liu Yang ◽

Jiangtao Xu

Keyword(s):

Conversion Rate ◽

Cmos Process ◽

Digital Output ◽

Sigma Delta ◽

Design And Implementation ◽

Conversion Time ◽

Cyclic Adc ◽

Sigma Delta Adc ◽

Oversampling Ratio ◽

Least Significant Bits

This paper presents the design and implementation of an extended-counting incremental sigma–delta ADC (IDC) with hardware-reuse technique. The proposed ADC architecture is a cascaded configuration of a second-order IDC and a two-stage cyclic ADC. The operation of the ADC consists of the “coarse phase” and the “fine phase”. In the “coarse phase”, the circuit works as an IDC to achieve the most significant bits (MSBs) and produce the residue voltage. Then in the “fine phase”, it is reused and changed to work as a cyclic ADC to quantize the residue voltage and achieve the least significant bits (LSBs). Eventual digital output is achieved by combining the two parts together. The utilization of extended-counting technique significantly reduces the conversion time and increases the conversion rate, and the hardware-reuse technique removes the demand for additional circuit area. The ADC is designed in 0.5[Formula: see text][Formula: see text]m CMOS process, which has a conversion rate of 43.48[Formula: see text]kS/s with oversampling ratio (OSR) of 23 and achieves 84.83[Formula: see text]dB SNDR and 13.799-bit ENOB. It consumes 2.4[Formula: see text]mW with a 5[Formula: see text]V voltage supply, and the FOM is 3.87[Formula: see text]pJ/step.

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Weak Keys in RSA with Primes Sharing Least Significant Bits

Information Security and Cryptology - Lecture Notes in Computer Science ◽

10.1007/978-3-642-16342-5_20 ◽

2010 ◽

pp. 278-287

Author(s):

Xianmeng Meng ◽

Jingguo Bi

Keyword(s):

Weak Keys ◽

Least Significant Bits

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LSB Array Based Image Steganography Technique by Exploring the Four Least Significant Bits

Communications in Computer and Information Science - Global Trends in Information Systems and Software Applications ◽

10.1007/978-3-642-29216-3_52 ◽

2012 ◽

pp. 479-488 ◽

Cited By ~ 10

Author(s):

Gandharba Swain ◽

Saroj Kumar Lenka

Keyword(s):

Image Steganography ◽

Least Significant Bits

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Cryptanalysis of Short Exponent RSA with Primes Sharing Least Significant Bits

Cryptology and Network Security - Lecture Notes in Computer Science ◽

10.1007/978-3-540-89641-8_4 ◽

2008 ◽

pp. 49-63 ◽

Cited By ~ 7

Author(s):

Hung-Min Sun ◽

Mu-En Wu ◽

Ron Steinfeld ◽

Jian Guo ◽

Huaxiong Wang

Keyword(s):

Least Significant Bits

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On the Implementation of a Digital Image Watermarking Framework Using Saliency and Phase Congruency

Advances in Data Mining and Database Management - Intelligent Multidimensional Data Clustering and Analysis ◽

10.4018/978-1-5225-1776-4.ch010 ◽

2017 ◽

pp. 253-292

Author(s):

Abhishek Basu ◽

Susmita Talukdar

Keyword(s):

Data Hiding ◽

Digital Image ◽

Image Watermarking ◽

Saliency Map ◽

Digital Image Watermarking ◽

Phase Congruency ◽

Hiding Capacity ◽

Spectral Residual ◽

Watermarking Scheme ◽

Least Significant Bits

In this paper, a saliency and phase congruency based digital image watermarking scheme has been projected. The planned technique implants data at least significant bits (LSBs) by means of adaptive replacement. Here more information is embedded into less perceptive areas within the original image determined by a combination of spectral residual saliency map and phase congruency map. The position of pixels with less perceptibility denotes the most unimportant region for data hiding from the point of visibility within an image. Therefore any modification within these regions will be less perceptible to one observer. The model gives a concept of the areas which has excellent data hiding capacity within an image. Superiority of the algorithm is tested through imperceptibility, robustness, along with data hiding capacity.

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