Comparison of FPGA and Microcontroller Implementations of an Innovative Method for Error Magnitude Evaluation in Reed–Solomon Codes

Reed–Solomon (RS) codes are one of the most used solutions for error correction logic in data communications. RS decoders are composed of several blocks: among them, many efforts have been made to optimize the error magnitude evaluation module. This paper aims to assess the performance of an innovative algorithm introduced in the literature by Lu et al. under different systems configurations and hardware platforms. Several configurations of the encoded message chosen between those typically used in different applications have been designed to be run on an FPGA (field programmable gate array) device and an MCU (microcontroller unit). The performances have been evaluated in terms of resource usage and output delay for the FPGA and in terms of code execution time for the MCU. As a benchmark in the analysis, the well-established Forney’s method is exploited: it has been implemented in the same configurations and on the same hardware platforms for a proper comparison. The results show that the theoretical finding are fully confirmed only in the MCU implementation, while on FPGA, the choice of one method with respect to the other depends on the optimization feature (i.e., time or area) that has been decided as a preference in the specific application.

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A System-On-Chip Approach in Designing a Dedicated RISC Microcontroller Unit Using the Field-Programmable Gate Array

2010 Fifth International Conference on Systems ◽

10.1109/icons.2010.40 ◽

2010 ◽

Author(s):

Elena Roxana Buhus ◽

Alexandru Lazar ◽

Adriano Tavares

Keyword(s):

Field Programmable Gate Array ◽

System On Chip ◽

Field Programmable ◽

Gate Array ◽

On Chip ◽

Microcontroller Unit

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Signature Restoration for Enhancing Robustness of FPGA IP Designs

International Journal of Information Security and Privacy ◽

10.4018/ijisp.2015070103 ◽

2015 ◽

Vol 9 (3) ◽

pp. 41-56 ◽

Cited By ~ 1

Author(s):

Jing Long ◽

Dafang Zhang ◽

Wei Liang ◽

Xia'an Bi

Keyword(s):

Intellectual Property ◽

Secret Sharing ◽

Field Programmable Gate Array ◽

Sufficient Evidence ◽

Ip Protection ◽

Rs Codes ◽

Field Programmable ◽

Hardware Resource ◽

Ip Cores ◽

Restoration Scheme

Many watermarking techniques for intellectual property (IP) protection are not resilient to tampering or removal attacks, especially for field programmable gate array (FPGA)-based IP cores. If attacked, the damaged watermarks cannot provide sufficient evidence in front of a court. To address this issue, the authors present a signature restoration scheme. The thought of secret sharing is introduced to share the signature into small watermarks. These watermarks are encoded with Reed-Solomon (RS) codes and embedded into unused lookup tables (LUTs) of used slices. Unlike most of existing techniques, the proposed scheme can restore the signature only by extracting parts of watermarks. So, it is tolerant to some damaged watermarks caused by removal attacks. The experiments show that the proposed scheme incurs no extra hardware resource and timing overhead. The robustness against attacks is much better by comparing to other schemes.

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Series Wound DC Motor Simulation Applying MATLAB SIMULINK and LabVIEW Control Design and Simulation Module

Periodica Polytechnica Transportation Engineering ◽

10.3311/pptr.12908 ◽

2019 ◽

Vol 48 (1) ◽

pp. 65-69

Author(s):

Gusztáv Áron Sziki ◽

Kornél Sarvajcz ◽

Attila Szántó ◽

Tamás Mankovits

Keyword(s):

Real Time ◽

Direct Current ◽

Field Programmable Gate Array ◽

Supply Voltage ◽

Control Design ◽

Driving Simulation ◽

Motor Simulation ◽

Resistance Torque ◽

Field Programmable ◽

Hardware Platforms

In our previous publication a model for series wound direct current (SWDC) motors was described and a simulation program was presented which is based on the above model and was developed in MATLAB environment. In the publication mentioned above, the measurement process of the parameters (bearing resistance torque, electric resistances, dynamic inductances) of the SWDC motor was also described. From the parameters the program calculates the current intensity, rpm and torque of the motor as a function of time. The recent publication is about the realization of the above program applying the Control Design and Simulation Module of NI LabVIEW. This module enables the adjustment of input parameters (e.g. supply voltage) during the running of the program, thus the realization of real time driving simulation. In addition, among others, it can be applied with data acquisition, GPIB, CAN, and FPGA (field-programmable gate array) hardware platforms of National Instruments.

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