scholarly journals Series Wound DC Motor Simulation Applying MATLAB SIMULINK and LabVIEW Control Design and Simulation Module

2019 ◽  
Vol 48 (1) ◽  
pp. 65-69
Author(s):  
Gusztáv Áron Sziki ◽  
Kornél Sarvajcz ◽  
Attila Szántó ◽  
Tamás Mankovits
Keyword(s):  
Real Time ◽  
Direct Current ◽  
Field Programmable Gate Array ◽  
Supply Voltage ◽  
Control Design ◽  
Driving Simulation ◽  
Motor Simulation ◽  
Resistance Torque ◽  
Field Programmable ◽  
Hardware Platforms

In our previous publication a model for series wound direct current (SWDC) motors was described and a simulation program was presented which is based on the above model and was developed in MATLAB environment. In the publication mentioned above, the measurement process of the parameters (bearing resistance torque, electric resistances, dynamic inductances) of the SWDC motor was also described. From the parameters the program calculates the current intensity, rpm and torque of the motor as a function of time. The recent publication is about the realization of the above program applying the Control Design and Simulation Module of NI LabVIEW. This module enables the adjustment of input parameters (e.g. supply voltage) during the running of the program, thus the realization of real time driving simulation. In addition, among others, it can be applied with data acquisition, GPIB, CAN, and FPGA (field-programmable gate array) hardware platforms of National Instruments.

scholarly journals Computationally efficient real-time digital predistortion architectures for envelope tracking power amplifiers

2013 ◽  
Vol 5 (2) ◽  
pp. 187-193 ◽  
Author(s):  
Pere L. Gilabert ◽  
Gabriel Montoro
Keyword(s):  
Real Time ◽  
Power Amplifiers ◽  
Field Programmable Gate Array ◽  
Nonlinear Distortion ◽  
Supply Voltage ◽  
Digital Predistortion ◽  
Computationally Efficient ◽  
Envelope Tracking ◽  
Field Programmable ◽  
Voltage Signal

This paper presents and discusses two possible real-time digital predistortion (DPD) architectures suitable for envelope tracking (ET) power amplifiers (PAs) oriented at a final computationally efficient implementation in a field programmable gate array (FPGA) device. In ET systems, by using a shaping function is possible to modulate the supply voltage according to different criteria. One possibility is to use slower versions of the original RF signal's envelope in order to relax the slew-rate (SR) and bandwidth (BW) requirements of the envelope amplifier (EA) or drain modulator. The nonlinear distortion that arises when performing ET with a supply voltage signal that follows both the original and the slow envelope will be presented, as well as the DPD function capable of compensating for these unwanted effects. Finally, two different approaches for efficiently implementing the DPD functions, a polynomial-based and a look-up table-based, will be discussed.

Real-time signal processing in field programmable gate array based digital gamma-ray spectrometer

2020 ◽  
Vol 91 (10) ◽  
pp. 104707
Author(s):  
Yinyu Liu ◽  
Hao Xiong ◽  
Chunhui Dong ◽  
Chaoyang Zhao ◽  
Quanfeng Zhou ◽  
...  
Keyword(s):  
Signal Processing ◽  
Real Time ◽  
Field Programmable Gate Array ◽  
Gamma Ray ◽  
Time Signal ◽  
Gamma Ray Spectrometer ◽  
Field Programmable ◽  
Gate Array ◽  
Real Time Signal Processing

The Design and Implementation of Parallel Distributed Algorithm FIR Filter Based on FPGA

2012 ◽  
Vol 571 ◽  
pp. 534-537
Author(s):  
Bao Feng Zhang ◽  
De Hu Man ◽  
Jun Chao Zhu
Keyword(s):  
Signal Processing ◽  
Real Time ◽  
Field Programmable Gate Array ◽  
Distributed Algorithm ◽  
Design Method ◽  
Fir Filter ◽  
Experimental Results ◽  
Linear Phase ◽  
Design And Implementation ◽  
Field Programmable

The article proposed a new method for implementing linear phase FIR filter based on FPGA. For the key to implementing the FIR filter on FPGA—multiply-add operation, a parallel distributed algorithm was presented, which is based on LUT. The designed file was described with VHDL and realized on Altera’s field programmable gate array (FPGA), giving the design method. The experimental results indicated that the system can run stably at 120MHz or more, which can meet the requirements of signal processing for real-time.

A Real-Time Processing System Based on Field Programmable Gate Array for Infrared Image

2009 ◽  
Vol 36 (2) ◽  
pp. 307-311
Author(s):  
罗凤武 Luo Fengwu ◽  
王利颖 Wang Liying ◽  
涂霞 Tu Xia ◽  
陈厚来 Chen Houlai
Keyword(s):  
Real Time ◽  
Field Programmable Gate Array ◽  
Infrared Image ◽  
Processing System ◽  
Real Time Processing ◽  
Time Processing ◽  
Field Programmable ◽  
Gate Array

scholarly journals Time Resolution Improvement Using Dual Delay Lines for Field-Programmable-Gate-Array-Based Time-to-Digital Converters with Real-Time Calibration

2018 ◽  
Vol 9 (1) ◽  
pp. 20 ◽  
Author(s):  
Yuan-Ho Chen
Keyword(s):  
Real Time ◽  
Field Programmable Gate Array ◽  
Delay Lines ◽  
Differential Nonlinearity ◽  
Time Calibration ◽  
Integral Nonlinearity ◽  
Resolution Improvement ◽  
Field Programmable ◽  
Gate Array ◽  
Set Up

This paper presents a time-to-digital converter (TDC) based on a field programmable gate array (FPGA) with a tapped delay line (TDL) architecture. This converter employs dual delay lines (DDLs) to enable real-time calibrations, and the proposed DDL-TDC measures the statistical distribution of delays to permit the calibration of nonuniform delay cells in FPGA-based TDC designs. DDLs are also used to set up alternate calibrations, thus enabling environmental effects to be immediately accounted for. Experimental results revealed that relative to a conventional TDL-TDC, the proposed DDL-TDC reduced the maximum differential nonlinearity by 26% and the integral nonlinearity by 30%. A root-mean-squared value of 32 ps was measured by inputting the constant delay source into the proposed DDL-TDC. The proposed scheme also maintained excellent linearity across a range of temperatures.

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