scholarly journals Selective Epitaxial Growth of In Situ Doped SiGe on Bulk Ge for p+/n Junction Formation

Electronics ◽  
2020 ◽  
Vol 9 (4) ◽  
pp. 578
Author(s):  
Konstantinos Garidis ◽  
Ahmad Abedin ◽  
Ali Asadollahi ◽  
Per-Erik Hellström ◽  
Mikael Östling

Epitaxial in situ doped Si0.73Ge0.27 alloys were grown selectively on patterned bulk Ge and bulk Si wafers. Si0.73Ge0.27 layers with a surface roughness of less than 3 nm were demonstrated. Selectively grown p+Si0.73Ge0.27 layers exhibited a resistivity of 3.5 mΩcm at a dopant concentration of 2.5 × 1019 boron atoms/cm3. P+/n diodes were fabricated by selectively growing p+- Si0.73Ge0.27 on n-doped bulk Ge and n-doped Si wafers, respectively. The geometrical leakage current contribution shifts from the perimeter to the bulk as the diode sizes increase. Extracted near midgap activation energies are similar to p+/n Ge junctions formed by ion implantation. This indicates that the reverse leakage current in p+/n Ge diodes fabricated with various doping methods, could originate from the same trap-assisted mechanism. Working p+/n diodes on Ge bulk substrates displayed a reverse current density as low as 2.2·10−2 A/cm2 which was found to be comparable to other literature data. The layers developed in this work can be used as an alternative method to form p+/n junctions on Ge substrates, showing comparable junction leakage results to ion implantation approaches.

2008 ◽  
Vol 310 (21) ◽  
pp. 4507-4510 ◽  
Author(s):  
Tetsuya Ikuta ◽  
Shigeru Fujita ◽  
Hayato Iwamoto ◽  
Shingo Kadomura ◽  
Takayoshi Shimura ◽  
...  

2007 ◽  
Author(s):  
Tetsuya Ikuta ◽  
Yuki Miyanami ◽  
Shigeru Fujita ◽  
Hayato Iwamoto ◽  
Shingo Kadomura ◽  
...  

2011 ◽  
Vol 324 ◽  
pp. 14-19
Author(s):  
Gabriel Ferro

In this paper, the issues related to in-situ doping of silicon carbide (SiC) semiconductor during epitaxial growth are reviewed. Some of these issues can find solution by using an original approach called vapour-liquid-solid (VLS) mechanism. In this technique, the SiC seed is covered by a Sibased melt and is fed by propane in order to growth the epitaxial film. Using Al-Si melts and temperatures as low as 1100°C, very high p type doping was demonstrated, with a record value of 1.1021 at.cm-3. It leads to very low contact resistivity and even to metallic behaviour of the SiC deposit even at low temperature. Using Ge-Si melts, non intentionally low doped n type layers are grown. By forming Si-containing liquid droplets on a SiC seed, one can extrapolate this VLS growth to selective epitaxial growth (SEG). Such approach was successfully applied for both Al and Ge-based systems in order to form p+ and n doped areas respectively.


1991 ◽  
Vol 6 (4) ◽  
pp. 784-791 ◽  
Author(s):  
M.C. Arst ◽  
K.N. Ritz ◽  
S. Redkar ◽  
J.O. Borland ◽  
J. Hann ◽  
...  

Surface planarity and epi/SiO2 interface characteristics of selective epitaxial growth (SEG) and epitaxial lateral overgrowth (ELO), deposited at 800–950 °C/10 or 25 Torr, have been studied for micron-sized structures. SEG at 860 °C showed superior planarity and reduced ratio of facet width to epi thickness, compared to higher deposition temperatures. Data showed that epi/SiO2 interface defects are greatly reduced for structures parallel to (100) and/or by adding HCl to the source gas, compared to interfaces positioned at standard orientation (110) on a (100) substrate. The transition from SEG to ELO in view of the facet orientations will be discussed. To correlate structural with electrical data, n+/p diodes were fabricated on as-grown and polish planarized SEG. Leakage current values of approximately 100 nA/cm2 could be measured. These are comparable to similar n+/p junctions fabricated on conventional epi.


2006 ◽  
Author(s):  
Tetsuya Ikuta ◽  
Yuki Miyanami ◽  
Shigeru Fujita ◽  
Hayato Iwamoto ◽  
Shingo Kadomura

2004 ◽  
Vol 810 ◽  
Author(s):  
Christian Isheden ◽  
Per-Erik Hellström ◽  
Henry H. Radamson ◽  
Mikael Östling

ABSTRACTIntegration issues concerning recessed epitaxial SiGe(B) source/drain junctions formed by selective Si etching followed by selective epitaxial growth of in situ heavily B-doped Si1−xGex are presented. The concept is beneficial compared to conventional ion implanted junctions, since dopant activation above the solid solubility in Si can be obtained. When integrated in the PMOS process flow, the resulting Si1−xGex layer is very rough. Several possible causes for low quality epitaxy are discussed and improvements are proposed. It is suggested that the dopant type and/or concentration in the silicon substrate can have an effect on the process.


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