scholarly journals The Design of Compact SM4 Encryption and Decryption Circuits That Are Resistant to Bypass Attack

Electronics ◽  
2020 ◽  
Vol 9 (7) ◽  
pp. 1102
Author(s):  
Fang Zhou ◽  
Benjun Zhang ◽  
Ning Wu ◽  
Xiangli Bu
Keyword(s):  
Linear Transformation ◽  
Power Analysis ◽  
Side Channel ◽  
Random Delay ◽  
Side Channel Attacks ◽  
Differential Power Analysis ◽  
Operation Method ◽  
Encryption And Decryption ◽  
Power Curves ◽  
Random Insertion

In order to achieve the purpose of defending against side channel attacks, a compact SM4 circuit was designed based on the mask and random delay technique, and the linear transformation module was designed with random insertion of the pseudo operation method. By analyzing the glitch data generated by the S-box of SM4 with different inputs, the security against glitch attacks was confirmed. Then, the DPA (Differential Power Analysis) was performed on the designed circuit. The key could not be successfully obtained even in the case of 100,000 power curves, so that the safety of SM4 against DPA is verified. Finally, using Synopsys DC (Design Compiler, Mountain View, CA94043DC, USA) to synthesize the designed circuit, the results show that the area of the designed circuit in the SMIC 0.18 process is 82,734 μm2, which is 48% smaller than results reported in other papers.

scholarly journals Secure Triple Track Logic Robustness Against Differential Power and Electromagnetic Analyses

2009 ◽  
Vol 4 (1) ◽  
pp. 20-28
Author(s):  
V. Lomné ◽  
A. Dehbaoui ◽  
T. Ordas ◽  
P. Maurine ◽  
L. Torres ◽  
...  
Keyword(s):  
Power Analysis ◽  
Design Guidelines ◽  
Side Channel ◽  
Side Channel Attacks ◽  
Secret Data ◽  
Differential Power Analysis ◽  
Basic Concepts

Side channel attacks (SCA) are known to be efficient techniques to retrieve secret data. In this context, this paper concerns the evaluation of the robustness of secure triple track logic (STTL) against power and electromagnetic analyses on FPGA devices. More precisely, it aims at demonstrating that the basic concepts behind STTL are valid in general and particularly for FPGAs. Also, the paper shows that this new logic may provide interesting design guidelines to get circuits that are resistant to differential power analysis (DPA) attacks which and also more robust against differential electromagnetic attacks (DEMA).

NEMR: A Nonequidistant DPA Attack-Proof of Modular Reduction in a CRT Implementation of RSA

2018 ◽  
Vol 27 (12) ◽  
pp. 1850191 ◽  
Author(s):  
S. Kaedi ◽  
M. Doostari ◽  
M. B. Ghaznavi-Ghoushchi
Keyword(s):  
Digital Signature ◽  
Power Analysis ◽  
Input Data ◽  
Side Channel ◽  
Reduction Step ◽  
Side Channel Attacks ◽  
Differential Power Analysis ◽  
Embedded Design ◽  
Power Analysis Attack

One of the most common algorithms in a digital signature is the RSA-CRT. Several side channel attacks have been presented on the RSA-CRT’s embedded design. Such attacks are divided into two categories: attack in the modular reduction step and attack in the recombination step. The former are plaintext attacks and based on the modular reduction on equidistant data attack, which is introduced in [B. den Boer, et al., “A DPA attack against the modular reduction within a CRT implementation of RSA,” in CHES 2002]. In these attacks, instead of using random plaintext, an equidistant series of input data is used. In a chosen and equidistant plaintext attack, the attacker needs a higher level of accessibility, and it is more difficult than a nonchosen plaintext attack. In this paper, we present a nonequidistant plaintext (but chosen plaintext) differential power analysis attack on the modular reduction in RSA-CRT, named NEMR (nonequidistant plaintext on modular reduction). We also present a new countermeasure on NEMR attack, which is resistant against equidistant and nonequidistant data attack on reduction step in RSA-CRT. In order to prove the idea, the NEMR attack is applied on the RSA-CRT 2048-bit implementation on SAKURA-G board, and the result is evaluated. Then, the presented countermeasure on NEMR attack is tested, and practical results demonstrate the validity of the proposed approach.

scholarly journals Side-Channel Power Resistance for Encryption Algorithms Using Implementation Diversity

Cryptography ◽  
2020 ◽  
Vol 4 (2) ◽  
pp. 13
Author(s):  
Ivan Bow ◽  
Nahome Bete ◽  
Fareena Saqib ◽  
Wenjie Che ◽  
Chintan Patel ◽  
...  
Keyword(s):  
Power Analysis ◽  
Side Channel ◽  
Side Channel Attacks ◽  
Dynamic Partial Reconfiguration ◽  
Channel Power ◽  
Diversity Techniques ◽  
Gate Arrays ◽  
Field Programmable ◽  
Programmable Gate Arrays ◽  
Encryption Algorithms

This paper investigates countermeasures to side-channel attacks. A dynamic partial reconfiguration (DPR) method is proposed for field programmable gate arrays (FPGAs)s to make techniques such as differential power analysis (DPA) and correlation power analysis (CPA) difficult and ineffective. We call the technique side-channel power resistance for encryption algorithms using DPR, or SPREAD. SPREAD is designed to reduce cryptographic key related signal correlations in power supply transients by changing components of the hardware implementation on-the-fly using DPR. Replicated primitives within the advanced encryption standard (AES) algorithm, in particular, the substitution-box (SBOX)s, are synthesized to multiple and distinct gate-level implementations. The different implementations change the delay characteristics of the SBOXs, reducing correlations in the power traces, which, in turn, increases the difficulty of side-channel attacks. The effectiveness of the proposed countermeasures depends greatly on this principle; therefore, the focus of this paper is on the evaluation of implementation diversity techniques.

scholarly journals Comparison of Cost of Protection against Differential Power Analysis of Selected Authenticated Ciphers

Cryptography ◽  
2018 ◽  
Vol 2 (3) ◽  
pp. 26 ◽  
Author(s):  
William Diehl ◽  
Abubakr Abdulgadir ◽  
Farnoud Farahmand ◽  
Jens-Peter Kaps ◽  
Kris Gaj
Keyword(s):  
Energy Efficient ◽  
Power Analysis ◽  
Side Channel ◽  
Sensitive Data ◽  
Differential Power Analysis ◽  
Test Vectors ◽  
Power And Energy ◽  
Cost Of Protection ◽  
Test Architecture ◽  
Leakage Assessment

Authenticated ciphers, which combine the cryptographic services of confidentiality, integrity, and authentication into one algorithmic construct, can potentially provide improved security and efficiencies in the processing of sensitive data. However, they are vulnerable to side-channel attacks such as differential power analysis (DPA). Although the Test Vector Leakage Assessment (TVLA) methodology has been used to confirm improved resistance of block ciphers to DPA after application of countermeasures, extension of TVLA to authenticated ciphers is non-trivial, since authenticated ciphers have expanded input and output requirements, complex interfaces, and long test vectors which include protocol necessary to describe authenticated cipher operations. In this research, we upgrade the FOBOS test architecture with capability to perform TVLA on authenticated ciphers. We show that FPGA implementations of the CAESAR Round 3 candidates ACORN, Ascon, CLOC (with AES and TWINE primitives), SILC (with AES, PRESENT, and LED primitives), JAMBU (with AES and SIMON primitives), and Ketje Jr.; as well as AES-GCM, are vulnerable to 1st order DPA. We then use threshold implementations to protect the above cipher implementations against 1st order DPA, and verify the effectiveness of countermeasures using the TVLA methodology. Finally, we compare the unprotected and protected cipher implementations in terms of area, performance (maximum frequency and throughput), throughput-to-area (TP/A) ratio, power, and energy per bit (E/bit). Our results show that ACORN consumes the lowest number of resources, has the highest TP/A ratio, and is the most energy-efficient of all DPA-resistant implementations. However, Ketje Jr. has the highest throughput.

Advanced modes in AES: Are they safe from power analysis based side channel attacks?

2014 ◽  
Author(s):  
Darshana Jayasinghe ◽  
Roshan Ragel ◽  
Jude Angelo Ambrose ◽  
Aleksandar Ignjatovic ◽  
Sri Parameswaran
Keyword(s):  
Power Analysis ◽  
Side Channel ◽  
Side Channel Attacks
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