128.76–129.56 GHz Fundamental Voltage Control Oscillator in 65 nm CMOS

This paper presented a fundamental voltage control oscillator (VCO), and its operating frequency ranged from 128.76 GHz to 129.56 GHz. A differential low negative coupling shield switch (DLNCSS) inductor was proposed and analyzed, which helped to improve the tuning range and phase noise of the presented VCO. Meanwhile, an improved transformer-coupled resonant tank, which consisted of DLNCSS inductor and differential varactor using the common-cathode structure, was used to improve the phase noise of the proposed VCO further. This presented VCO was designed and fabricated by using 65 nm CMOS process, which occupied a compact area of 0.23 mm2, including all testing pads. The measurement results showed that this VCO consumed 11.2 mW from a 1.4 V supply and had the tuning range of 0.8 GHz. The output power ranged from −11.8 dBm to −10.6 dBm in its operating frequency band. The post-layout simulation showed that the phase noise at 1 MHz was better than −82 dBc/Hz.

A Novel Dual-Band Six-Phase Voltage-Control Oscillator

The paper presents a novel dual-band six-phase voltage-control oscillator. The voltage-controlled oscillator (VCO) with a single-ended delay cell architecture has a lower power consumption, a smaller chip area, and a larger output swing than one with a differential delay cell architecture. However, the conventional even-phase outputs ring-type VCO cannot be implemented using single-ended delay cells. In other words, the VCO with single-ended delay cells meets most of the requirements of a sensor circuit system, except even-phase outputs function. This work presents a dual-band six-phase ring type VCO, which is implemented using the proposed single-ended delay cell. The proposed VCO both exhibits the advantages of single-ended delay cells and differential delay cells. The proposed delay cell has a band-switching function, which improves the jitter performance of a VCO in which it is used. The proposed VCO can be operated at 890–1080 MHz. The peak-to-peak jitter and the root mean square jitter are the 35.5 ps and 2.8 ps (at 1 GHz), respectively. The maximal power consumption is approximately 6.4 mW at a supply voltage of 1.8 V in a United Microelectronics Corporation 0.18 μm RF CMOS process. The area of the chip is 0.195 × 0.208 mm2.