scholarly journals 128.76–129.56 GHz Fundamental Voltage Control Oscillator in 65 nm CMOS

Electronics ◽  
2020 ◽  
Vol 9 (6) ◽  
pp. 898
Author(s):  
Guodong Su ◽  
Dirong Chen ◽  
Kaixuan Pang ◽  
Haijun Gao ◽  
Jiangtao Su ◽  
...  
Keyword(s):  
Phase Noise ◽  
Tuning Range ◽  
Voltage Control ◽  
Operating Frequency ◽  
Cmos Process ◽  
Voltage Control Oscillator ◽  
Measurement Results ◽  
Cathode Structure ◽  
Negative Coupling ◽  
Better Than

This paper presented a fundamental voltage control oscillator (VCO), and its operating frequency ranged from 128.76 GHz to 129.56 GHz. A differential low negative coupling shield switch (DLNCSS) inductor was proposed and analyzed, which helped to improve the tuning range and phase noise of the presented VCO. Meanwhile, an improved transformer-coupled resonant tank, which consisted of DLNCSS inductor and differential varactor using the common-cathode structure, was used to improve the phase noise of the proposed VCO further. This presented VCO was designed and fabricated by using 65 nm CMOS process, which occupied a compact area of 0.23 mm2, including all testing pads. The measurement results showed that this VCO consumed 11.2 mW from a 1.4 V supply and had the tuning range of 0.8 GHz. The output power ranged from −11.8 dBm to −10.6 dBm in its operating frequency band. The post-layout simulation showed that the phase noise at 1 MHz was better than −82 dBc/Hz.

scholarly journals A 217.6–227-GHz CMOS Signal Generator with Injection Locking Technique

2019 ◽  
Vol 28 (12) ◽  
pp. 2050140
Author(s):  
Weiwei Cheng ◽  
Xing Quan ◽  
Jiang Luo ◽  
Guodong Su
Keyword(s):  
Phase Noise ◽  
Output Power ◽  
Tuning Range ◽  
Frequency Tuning ◽  
Injection Locking ◽  
Signal Generator ◽  
Cmos Process ◽  
Silicon Area ◽  
Em Simulation ◽  
Better Than

This paper proposes a 217.6–227-GHz signal generator with injection locking technique in 65-nm CMOS process. The injection locking technique is exploited to synchronize the phases of the two individual voltage control oscillators (VCOs) and improve the output power. The phase noise of the proposed signal generator is improved. The full-layout electromagnetic (EM) simulation in collaboration with the post-layout simulation is utilized to verify the proposed signal generator. The simulation results show that the frequency tuning range is 9.4[Formula: see text]GHz, and the output power is larger than [Formula: see text]14.25[Formula: see text]dBm. The phase noise at 1[Formula: see text]MHz off the carrier is better than [Formula: see text]92.12[Formula: see text]dBc/Hz. The signal generator occupies a compact silicon area of 0.23[Formula: see text]mm2 including all testing pads.

A low phase noise 20 GHz voltage control oscillator using 0.18-μm CMOS technology

2010 ◽  
Author(s):  
C. M. Yang ◽  
H. L. Kao ◽  
Y. C. Chang ◽  
M. T. Chen ◽  
H. M. Chang ◽  
...  
Keyword(s):  
Phase Noise ◽  
Voltage Control ◽  
Cmos Technology ◽  
Voltage Control Oscillator ◽  
Low Phase Noise

scholarly journals A Very Low-phase-noise CMOS Ring VCO Intended for Sensor Interfaces

2021 ◽  
Author(s):  
Mahin Esmaeilzadeh ◽  
Yves Audet ◽  
Mohamed Ali ◽  
Mohamad Sawan
Keyword(s):  
Phase Noise ◽  
Tuning Range ◽  
Cmos Process ◽  
Voltage Controlled Oscillator ◽  
Silicon Area ◽  
Wide Range ◽  
Extended Frequency ◽  
Sensor Interfaces ◽  
Low Phase Noise ◽  
Analytical Expressions

<p>We describe in the paper a ring voltage-controlled oscillator (VCO) indicating an improved phase noise over a wide range of frequency offsets and an extended frequency/voltage tuning range. The phase noise is improved by leveraging a better linearity approach, while reducing the VCO gain and maintaining wide tuning range. The proposed VCO is a block of a time-domain comparator embedded in a monitoring and readout circuit of an industrial sensor interface. An analytical model is extracted resulting in closed-form expressions for both input-referred noise and phase noise of the VCO. Employing the analytical expressions, the contributed noise and phase noise limitations are fully addressed, and all the effective factors are investigated. The prototype of the proposed VCO was implemented and fabricated in a 0.35 µm CMOS process. The integrated VCO consumes 0.903 mW from a 3.3 V supply, when running at its maximum frequency of 9.37 MHz. The measured phase noise of the proposed VCO is -147.57 dBc/Hz at 1 MHz offset from the 9.37 MHz oscillation frequency, and the occupied silicon area of circuit is 0.005 mm<sup>2</sup>.</p>

scholarly journals A Design of Wide-Range and Low Phase Noise Linear Transconductance VCO with 193.76 dBc/Hz FoMT for mm-Wave 5G Transceivers

Electronics ◽  
2020 ◽  
Vol 9 (6) ◽  
pp. 935 ◽  
Author(s):  
Arash Hejazi ◽  
YoungGun Pu ◽  
Kang-Yoon Lee
Keyword(s):  
Phase Noise ◽  
Carrier Frequency ◽  
Tuning Range ◽  
Frequency Tuning ◽  
Cmos Process ◽  
Switched Capacitor ◽  
Voltage Controlled Oscillator ◽  
Wide Range ◽  
Layout Area ◽  
Low Phase Noise

This paper presents a wide-range and low phase noise mm-Wave Voltage Controlled Oscillator (VCO) based on the transconductance linearization technique. The proposed technique eliminates the deep triode region of the active part of the VCO, and lowers the noise introduced by the gm-cell. The switch sizes inside the switched capacitor bank of the VCO are optimized to minimize the resistance of the switches while keeping the wide tuning range. A new layout technique shortens the routing of the VCO outputs, and lowers the parasitic inductance and resistance of the VCO routing. The presented method prevents the reduction of the quality factor of the tank due to the long routing. The proposed VCO achieves a discrete frequency tuning range, of 14 GHz to 18 GHz, through a linear coarse and middle switched capacitor array, and offers superior phase noise performance compared to recent state-of-the-art VCO architectures. The design is implemented in a 45 nm CMOS process and occupies a layout area (including output buffers) of 0.14 mm2. The power consumption of the VCO core is 24 mW from the power supply of 0.8 V. The post-layout simulation result shows the VCO achieves the phase noise performances of −87.2 dBc/Hz and −113 dBc/Hz, at 100 kHz and 1 MHz offset frequencies from the carrier frequency of 14 GHz, respectively. In an 18 GHz carrier frequency, the results are −87.4 dBc/Hz and −110 dBc/Hz, accordingly.

scholarly journals Low Phase Noise and Wide-Range Class-C VCO Using Auto-Adaptive Bias Technique

Electronics ◽  
2020 ◽  
Vol 9 (8) ◽  
pp. 1290
Author(s):  
Jeong-Yun Lee ◽  
Gwang Sub Kim ◽  
Goo-Han Ko ◽  
Kwang-Il Oh ◽  
Jae Gyeong Park ◽  
...  
Keyword(s):  
Phase Noise ◽  
Tuning Range ◽  
Frequency Tuning ◽  
Wide Frequency Range ◽  
Cmos Process ◽  
Voltage Controlled Oscillator ◽  
Frequency Range ◽  
Wide Range ◽  
Class C ◽  
Low Phase Noise

This paper proposes a new structure of 24-GHz class-C voltage-controlled oscillator (VCO) using an auto-adaptive bias technique. The VCO in this paper uses a digitally controlled circuit to eliminate the possibility of start-up failure that a class-C structure can have and has low phase noise and a wide frequency range. To expand the frequency tuning range, a 3-bit cap-bank is used and a triple-coupled transformer is used as the core inductor. The proposed class-C VCO implements a 65-nm RF CMOS process. It has a phase noise performance of −105 dBc/Hz or less at 1-MHz offset frequency and the output frequency range is from 22.8 GHz to 27.3 GHz, which consumes 8.3–10.6 mW of power. The figure-of-merit with tuning range (FoMT) of this design reached 191.1 dBc/Hz.

Design of a Low Phase Noise VCO for WSN Applications

2014 ◽  
Vol 577 ◽  
pp. 620-623 ◽  
Author(s):  
Xiao Ming Si ◽  
Xiang Ning Fan ◽  
Li Tang ◽  
Jian Jiang
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Phase Noise ◽  
Tuning Range ◽  
Low Voltage ◽  
Second Harmonic ◽  
Low Power Consumption ◽  
Cmos Process ◽  
Noise Performance ◽  
Phase Noise Performance

A fully integrated LC VCO with 1V low voltage supply, applied in the frequency synthesizer for wireless sensor network applications, is designed and implemented in TSMC 0.18μm RF/MS CMOS process with low power consumption and good phase noise performance. To conquer the problems brought by low voltage, the structure of VCO is carefully selected. A 4 bit switched capacitor array is used to widen tuning range without worsen the phase noise performance. Besides, a 2 bit switched tail current source array is used to achieve power consumption adapted to the desired operating scenario. Second harmonic filter technology is taken to improve phase noise performance. The VCO designed in this paper has good phase noise performance and low power consumption by optimization. The chip size is 860μm×730μm. Post-simulation results show that the frequency range is between 4.57~6.18GHz with tuning range 30%, the center frequency is 5.375GHz, and the power consumption of VCO core is between 2.6~4mW. At the meanwhile, phase noise is between-116.0~ [email protected].

A 24 GHz wideband monostatic FMCW radar system based on a single-channel SiGe bipolar transceiver chip

2013 ◽  
Vol 5 (3) ◽  
pp. 309-317 ◽  
Author(s):  
Christian Bredendiek ◽  
Nils Pohl ◽  
Timo Jaeschke ◽  
Sven Thomas ◽  
Klaus Aufinger ◽  
...  
Keyword(s):  
Power Consumption ◽  
Phase Noise ◽  
Tuning Range ◽  
Continuous Wave ◽  
Single Channel ◽  
Radar System ◽  
Center Frequency ◽  
Fmcw Radar ◽  
24 Ghz ◽  
Better Than

In this paper a monostatic frequency-modulated continuous-wave (FMCW) radar system around a center frequency of 24 GHz with a wide tuning range of 8 GHz (≈33%) is presented. It is based on a fully integrated single-channel SiGe transceiver chip. The chip architecture consists of a fundamental VCO, a receive mixer, a divider chain, and coupling/matching networks. All circuits, except for the divider, are designed with the extensive use of on-chip monolithic integrated spiral inductors. The chip is fabricated in a SiGe bipolar production technology which offers an fT of 170 GHz and fmax of 250 GHz. The phase noise at 1 MHz offset is better than −100 dBc/Hz over the full-tuning range of 8 GHz and a phase noise of better than −111 dBc/Hz is achieved at 27 GHz. The peak output power of the chip is −1 dBm while the receive mixer offers a 1 dBm input referred compression point to keep it from being saturated. The chip has a power consumption of 245 mW and uses an area of 1.51 mm2. The FMCW radar system achieves a power consumption below 1.6 W. Owing to the high stability of the sensor, high accuracy mesaurements with a range error <±250 µm were achieved. The standard deviation between repeated measurements of the same target is 0.6 µm and the spatial resolution is 28 mm.

scholarly journals A Novel Dual-Band Six-Phase Voltage-Control Oscillator

Sensors ◽  
2018 ◽  
Vol 18 (11) ◽  
pp. 4025 ◽  
Author(s):  
San-Fu Wang ◽  
Yu-Wei Chang ◽  
Chun-Yen Tang
Keyword(s):  
Power Consumption ◽  
Voltage Control ◽  
Dual Band ◽  
Cmos Process ◽  
Voltage Control Oscillator ◽  
Phase Voltage ◽  
Ring Type ◽  
Differential Delay ◽  
Delay Cell ◽  
Cell Architecture

The paper presents a novel dual-band six-phase voltage-control oscillator. The voltage-controlled oscillator (VCO) with a single-ended delay cell architecture has a lower power consumption, a smaller chip area, and a larger output swing than one with a differential delay cell architecture. However, the conventional even-phase outputs ring-type VCO cannot be implemented using single-ended delay cells. In other words, the VCO with single-ended delay cells meets most of the requirements of a sensor circuit system, except even-phase outputs function. This work presents a dual-band six-phase ring type VCO, which is implemented using the proposed single-ended delay cell. The proposed VCO both exhibits the advantages of single-ended delay cells and differential delay cells. The proposed delay cell has a band-switching function, which improves the jitter performance of a VCO in which it is used. The proposed VCO can be operated at 890–1080 MHz. The peak-to-peak jitter and the root mean square jitter are the 35.5 ps and 2.8 ps (at 1 GHz), respectively. The maximal power consumption is approximately 6.4 mW at a supply voltage of 1.8 V in a United Microelectronics Corporation 0.18 μm RF CMOS process. The area of the chip is 0.195 × 0.208 mm2.

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