Hierarchical Scheduling of an SDF/L Graph onto Multiple Processors

Although dataflow models are known to thrive at exploiting task-level parallelism of an application, it is difficult to exploit the parallelism of data, represented well with loop structures, since these structures are not explicitly specified in existing dataflow models. SDF/L model overcomes this shortcoming by specifying the loop structures explicitly in a hierarchical fashion. We introduce a scheduling technique of an application represented by the SDF/L model onto heterogeneous processors. In the proposed method, we explore the mapping of tasks using an evolutionary meta-heuristic and schedule hierarchically in a bottom-up fashion, creating parallel loop schedules at lower levels first and then re-using them when constructing the schedule at a higher level. The efficiency of the proposed scheduling methodology is verified with benchmark examples and randomly generated SDF/L graphs.

Controlling the Complexity of Hierarchical Scheduling Frameworks

Hierarchical scheduling frameworks are a new scheduling paradigm where multiple system schedules are integrated (one-within-another). HSFs presents a multi-layered complexity problem that system engineers are struggling to contain. A promising trend in the aerospace and defense industry is to employ Digital Engineering’s Model-Based Systems Engineering (MBSE) to deal with the complexity of HSFs. MBSE permits the abstraction of application-specific details that can radically speed up system design exploration. Thus, this paper investigates how the output from an HSF algorithm can be converted into an MBSE modeling language that enables architectural exploration for resource allocation. The Unified Modeling Language (UML) Modeling and Analysis of Real-Time and Embedded Systems (MARTE) Profile is the chosen unified modeling language of MBSE. The modeling language is used with an HSF application for demonstration purposes. The approach in this paper seeks to limit tool use by combining an inline verification method (Genetic Algorithm) with a new MBSE workflow.

Hierarchical Scheduling for Real-Time Periodic Tasks in Symmetric Multiprocessing

In this paper, we present a new hierarchical scheduling framework for periodic tasks in symmetric multiprocessor (SMP) platforms. Partitioned and global scheduling are the two main approaches used by SMP based systems where global scheduling is recommended for overall performance and partitioned scheduling is recommended for hard real-time performance. Our approach combines both the global and partitioned approaches of traditional SMP-based schedulers to provide hard real-time performance guarantees for critical tasks and improved response times for soft real-time tasks. Implemented as part of VxWorks, the results are confirmed using a real-time benchmark application, where response times were improved for soft real-time tasks while still providing hard real-time performance.