Architecture and Performance Evaluation of a Novel Optical Packet Switch with Input Concentrators

In this paper, we propose a novel optical packet switch (OPS) architecture with input concentrators, which employ multi-input single-output optical buffers to aggregate all the incoming traffic into a small size switching fabric. Accordingly, the physical size, the number of the needed wavelength converters, and the economic cost of the total OPS node are decreased dramatically. However, the deployment of input concentrators introduces additional packet loss and delay, except from the contention at the switch output. A Markov model is presented to study the packet loss ratio (PLR) and average packet delay given by the input concentrators. The corresponding closed form expressions are given. The model also demonstrates that the system performance can be greatly improved by increasing the buffer size when the traffic load is not larger than 0.69315. The analytical values are compared with the simulation results. All the obtained results show that the proposed model provides satisfactory approximations under different network scenarios. Moreover, the economic cost savings of the proposed OPS node at the present time and its evolution as a function of time are also discussed in detail. The proposed architecture can also be applied in a packet enhanced optical transport network (OTN).

Hybrid buffer and AWG based add-drop optical packet switch

Optical packet switching (OPS) exhibits the ability to be utilized as a data transmission technique for next-generation. The core router/switch plays a significant role in packet routing and buffering in OPS. Arrayed waveguide grating (AWG) is realized as a promising core element for fast optical switching, with its intrinsic capacity to achieve wavelength routing of different wavelengths in parallel. This paper proposes an AWG-based add-drop optical packet switch, including a hybrid buffer, to resolve contention among packets. In a hybrid buffer, both optical and electronic buffers are used for the buffering of contending packets. AWGs are affected by crosstalk that can significantly impair system operation. The physical layer analysis is discussed in the presence of crosstalk, and the performance of the switch is evaluated in terms of bit error rate. The desired minimum input power is calculated for the switch’s correct operation for both optical buffer and electronic buffer. Finally, the packet loss probability (PLP) of the hybrid buffer is examined under various buffering conditions. Results reveal that with the increase in the optical power of the input signal, crosstalk power increases linearly for optical and electronic buffers. The increased crosstalk power is higher for electronic buffers than the optical buffer. The use of electronic memory in the hybrid buffer allows the hybrid buffer to increase its buffer size thus, reducing the PLP.

Performance Evaluation of a Hybrid Buffer-Based Optical Packet Switch Router

Recently, in the present day’s data center systems an explosive growth has been observed in data traffic, which restricts the speed of exiting data communication network. To solve such problem, fiber optical-based optical communication system is preferred choice. In this paper, an arrayed waveguide grating (AWG)-based optical packet switch is presented in which priority among packets is implemented effectively. This switch is a recirculating loop buffer-based switch in which a hybrid buffering (optical + electrical) technique is used for storing packets into the buffer. The power budget analysis of switch is presented in various conditions, when packet passes through the optical or electronic buffers. Comparison of optical and electronic buffering is done in terms of power required for the correct operation of the switch. In this paper, a comparison is performed between our proposed switch with recently published switch designs. The result presented in this paper clearly reveals that the performance of our proposed switch is far better than other previously published switch architecture. The major beauty of our proposed switch is that in this design priority among packets implemented effectively.