Cascadability analysis of WDM recirculating loop buffer-based switch in optical data networks

In recent years the development of cloud computing, big data, cell phone application increases day by day and this will increase the work load on the server centers. Once the network traffic increases the power consumption also increases. In recent past, for reducing this power consumption arrayed waveguide grating (AWG) based optical packet switches are proposed. In these switches the physical and network layer analysis has been presented in isolated switch. In the core network to achieve low packet loss probability an effective buffering technique is required into the design of switch. In this paper a recirculating loop buffer based switch is presented, in this switch design for sharing the recirculating buffer, WDM technology is used by the packets. The main advantage of recirculating buffer is that it allows packet priority routing and by using this technique longer duration buffering of packet is achieved. This feature provides the quality of service in optical networks. In this paper, switch is deployed in the network and the performance of switch is measured when multiple switches are cascaded in the network simultaneously. The power analysis of switch is also performed for isolated and cascaded switches. For fixing the size of the switch into the network the concept of graph theory and random graph model is used.

Performance Evaluation of a Hybrid Buffer-Based Optical Packet Switch Router

Recently, in the present day’s data center systems an explosive growth has been observed in data traffic, which restricts the speed of exiting data communication network. To solve such problem, fiber optical-based optical communication system is preferred choice. In this paper, an arrayed waveguide grating (AWG)-based optical packet switch is presented in which priority among packets is implemented effectively. This switch is a recirculating loop buffer-based switch in which a hybrid buffering (optical + electrical) technique is used for storing packets into the buffer. The power budget analysis of switch is presented in various conditions, when packet passes through the optical or electronic buffers. Comparison of optical and electronic buffering is done in terms of power required for the correct operation of the switch. In this paper, a comparison is performed between our proposed switch with recently published switch designs. The result presented in this paper clearly reveals that the performance of our proposed switch is far better than other previously published switch architecture. The major beauty of our proposed switch is that in this design priority among packets implemented effectively.

Analysis of AWG-Based Optical Data Center Switches

Optical packet switching (OPS) is an emerging area of research in next-generation datacenter applications. There is an exponential growth in the internet traffic due to applications such as social networking, cloud computing, video streaming, etc. Fiber optical network plays a critical role in various data center (DC) operations. Large bandwidth of the optical fiber made OPS, a promising technology for DCs. Arrayed waveguide gratings (AWGs) are used more frequently in the core of optical packet switches due to its low insertion loss and wavelength dependent routing pattern. Optical switching function can be performed by AWG if each input port is properly equipped with Tunable wavelength converters (TWCs). This paper presents analysis of four optical packet switches namely AWG and Feedback Loop Buffer based switch, AWG and Electronic Memory based switch, Petabit Optical Switch, AWG and Feedback Loop Buffer Loss Compensated based Switch. Switches are analyzed for Bit Error Rate (BER) and energy consumption. The power and noise analysis is performed for calculating the total power required for correct operation of switch and to determine the BER using physical layer analysis. Minimum power level is determined so that received bits are decoded correctly. Energy consumption per bit is also evaluated to identify architecture consuming less energy in the considered architectures.

A High-PSRR Low Dropout Regulator for LNB Using the First-Stage Reference-Included Coarse-Filtering Technique

A high-PSRR low dropout regulator using the first-stage reference-included coarse-filtering technique is presented, for the reduced output ripple of the low noise block (LNB) power supply in the satellite set-top box. Compared with the conventional system, the regulator with the technique is characterized by the two successive negative feedback loops, so as to alleviate the output ripple of the power supply caused by the preceding DC–DC converter's modulation signal. With the technique, the ripple near to the frequency of the LNB supply voltage tuning signal (22 kHz) can be significantly alleviated. To further enhance the PSRR performance without the reference-by-pass capacitor, the bipolar-loop buffer amplifier and the reference-included coarse-filtering regulator are proposed. The circuits are extracted from the LDO layout and simulated with a 0.35 μm BCD process in Cadence. With the typical 16.3 V input supply voltage and loading current 100 mA, the line regulation corresponding to the DC supply voltage is achieved at -72 dB; the PSRR performance of the supply voltage ripple up to the frequency (100 kHz) is better than -70 dB; Moreover, the quiescent current without the loading impedance is less than 153 μA.