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In major congenital heart ailments comes Atrial Septal Defect (ASD). Many techniques viz. ECG, MRI, Ultrasound etc., are in use to detect ASD. Performance of heart is analyzed by the Doctors through test results or observations of heart Ultrasound. In this research work it is proved that the disorder ASD is detected using the technique of block matching and optical flow. These algorithms enables the doctors or experts to detect ASD automatically and hence reduces the dependency on humans. This paper proposes a new Elongated Horizontal Large Diamond Search Pattern (EHLDSP) and Optical Flow algorithm for detection of ASD based on MV. Experimentation was carried out on A4C view of 2D Echo Cardiogram, collected form the hospitals as well as from open available database. Ground truth image is used by the cardiologist to compare the results. In this paper, performance of the proposed Elongated Horizontal Large Diamond Search Pattern (EHLDSP) method is compared with other techniques on the basis of cost functions like PSNR and computation complexity. EHLDSP algorithm is used to check the pixel movements and to calculate Motion Vector (MV), followed by the estimation of the displacement of blood cells from either right to left or vice versa. This will help in the reduction of dependency on specialized doctors or human factor can be reduced. For automatic detection of abnormality, research is going on in this area to make it fast and accurate. Proposed algorithm reduces the average computation by providing speed improvements of about 91% over FS/ES and about 6% over existing DS. Also, EHLDSP has shown improvements in the PSNR value in comparison with other methods.


The impact of search pattern is a crucial part in the block-based motion estimation for finding the motion vector. An issue of distortion performance and search speed heavily depends upon the size and shape of search strategy applied. Performing the deep analysis for motion vector distribution on standard test videos, it is desirable to have such type of algorithm that meets the requirement of searching motion vector in less time. Hence, a new kind of Pentagon algorithm is proposed in this paper for fast block-matching motion estimation (BMME). It is an easy and efficient technique for finding motion vector. Experimental results expose the proposed Pentagon algorithm sparsely surpass the noted Diamond search (DS) algorithm. The new Pentagon search algorithm is examined with the previously proposed Diamond search algorithm in terms of performance measure; the proposed algorithm attains better performance with the less complexity. The experimental examination also depicts that the pentagon algorithm is better than the previously proposed Diamond search (DS) in terms of mean-square error performance and required the number of search points. The overall speed improvement rate (SIR) is about 31% with respect to the DS.


2019 ◽  
Vol 9 (4) ◽  
pp. 1992-2001
Author(s):  
Hussain Ahmed Choudhury ◽  
Nidul Sinha ◽  
Tanvir H. Sardar ◽  
Archana Wagh-Mare

2018 ◽  
Vol 7 (4.10) ◽  
pp. 1075
Author(s):  
Prayline Rajabai C ◽  
Harish J ◽  
Sivanantham S

Motion estimation one of the advanced technique adapted in the industry for video coding and implemented in various applications. This work is focused on the efficient hardware implementation of the diamond search algorithm architecture. Among all the other Fast Search algorithms like three-step search, new three-step search, four-step search and diamond search (DS), the diamond search algorithm maintains the diamond shape search pattern and it gives faster search pattern and minimum absolute difference. When compared with the original diamond search (DS) algorithm, this modified diamond search algorithm requires less area and power maintaining the same performance. Other than the architectural level changes the low power synthesis is done and the results show that this design can be implemented effectively for an application that require fast search with low power requirements like IoT and sensor devices. The design has been implemented using Verilog HDL, synthesized using Synopsys DC compiler using 90nm technology.  


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