Design and Fabrication of Low-Cost Microfluidic Chips and Microfluidic Routing System for Reconfigurable Multi-(Organ-on-a-Chip) Assembly

A low-cost, versatile, and reconfigurable fluidic routing system and chip assembly have been fabricated and tested. The platform and its accessories were fabricated in-house without the need for costly and specialized equipment nor specific expertise. An agarose-based artificial membrane was integrated into the chips and employed to test the chip-to-chip communication in various configurations. Various chip assemblies were constructed and tested which demonstrate the versatile utility of the fluidic routing system that enables the custom design of the chip-to-chip communication and the possibility of fitting a variety of (organ-on-a-chip)-based biological models with multicell architectures. The reconfigurable chip assembly would enable selective linking/isolating the desired chip/compartment, hence allowing the study of the contribution of specific cell/tissue within the in vitro models.

3D microfluidic gradient generator for combination antimicrobial susceptibility testing

Microfluidic concentration gradient generators (µ-CGGs) have been utilized to identify optimal drug compositions through antimicrobial susceptibility testing (AST) for the treatment of antimicrobial-resistant (AMR) infections. Conventional µ-CGGs fabricated via photolithography-based micromachining processes, however, are fundamentally limited to two-dimensional fluidic routing, such that only two distinct antimicrobial drugs can be tested at once. This work addresses this limitation by employing Multijet-3D-printed microchannel networks capable of fluidic routing in three dimensions to generate symmetric multidrug concentration gradients. The three-fluid gradient generation characteristics of the fabricated 3D µ-CGG prototype were quantified through both theoretical simulations and experimental validations. Furthermore, the antimicrobial effects of three highly clinically relevant antibiotic drugs, tetracycline, ciprofloxacin, and amikacin, were evaluated via experimental single-antibiotic minimum inhibitory concentration (MIC) and pairwise and three-way antibiotic combination drug screening (CDS) studies against model antibiotic-resistant Escherichia coli bacteria. As such, this 3D µ-CGG platform has great potential to enable expedited combination AST screening for various biomedical and diagnostic applications.

A reconfigurable continuous-flow fluidic routing fabric using a modular, scalable primitive

Using a single primitive (A., B.) we created an algorithmically scalable (D.) reconfigurable routing fabric (E.) for continuous-flow microfluidic devices capable of arbitrary routing.

A Review of Two-Phase Forced Cooling in Three-Dimensional Stacked Electronics: Technology Integration

Three-dimensional (3D) stacked electronics present significant advantages from an electrical design perspective, ranging from shorter interconnect lengths to enabling heterogeneous integration. However, multitier stacking exacerbates an already difficult thermal problem. Localized hotspots within individual tiers can provide an additional challenge when the high heat flux region is buried within the stack. Numerous investigations have been launched in the previous decade seeking to develop cooling solutions that can be integrated within the 3D stack, allowing the cooling to scale with the number of tiers in the system. Two-phase cooling is of particular interest, because the associated reduced flow rates may allow reduction in pumping power, and the saturated temperature condition of the coolant may offer enhanced device temperature uniformity. This paper presents a review of the advances in two-phase forced cooling in the past decade, with a focus on the challenges of integrating the technology in high heat flux 3D systems. A holistic approach is applied, considering not only the thermal performance of standalone cooling strategies but also coolant selection, fluidic routing, packaging, and system reliability. Finally, a cohesive approach to thermal design of an evaporative cooling based heat sink developed by the authors is presented, taking into account all of the integration considerations discussed previously. The thermal design seeks to achieve the dissipation of very large (in excess of 500 W/cm2) background heat fluxes over a large 1 cm × 1 cm chip area, as well as extreme (in excess of 2 kW/cm2) hotspot heat fluxes over small 200 μm × 200 μm areas, employing a hybrid design strategy that combines a micropin–fin heat sink for background cooling as well as localized, ultrathin microgaps for hotspot cooling.

Performance and Integration Implications of Addressing Localized Hotspots Through Two Approaches: Clustering of Micro Pin-Fins and Dedicated Microgap Coolers

An evaluation of two approaches to localized hotspot cooling is conducted through both numerical modeling and experimental demonstration, with the advantages and limitations of each approach highlighted. The first approach, locally increasing the density of pins in a micro pin fin heat sink, was shown through numerical modeling to deliver a factor of two enhancement in effective heat transfer coefficient by doubling the pin density near the hotspot. This simpler approach to maintaining temperature uniformity eliminates the need for hotspot specific fluid routing and delivery, and also has minimal impact on the larger flow field. Dedicated hotspot coolers, on the other hand, have the ability to dissipate significantly larger heat fluxes while maintaining manageable pressure drops, because the flow rate to the dedicated cooler can be closely matched to the demands of the hotspot. Dissipation of hotspot heat fluxes in excess of 2 kW/cm2 is demonstrated experimentally using a two phase dedicated hotspot cooler. However, dedicated coolers require additional fluidic routing and manifolding to efficiently deliver the coolant to the hotspot. These integration concerns are considered in concert with the performance of the hotspot cooler itself to enable better informed thermal design for both system level and device level cooling.