Reconfigurable hardware architecture for Mean Level and log-t CFAR detectors in FPGA implementations
2019 ◽
Vol 16
(21)
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pp. 20190584-20190584
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2015 ◽
Vol 69
(1)
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pp. 1-13
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2020 ◽
Vol 5
(1)
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pp. 11
2018 ◽
Vol 38
(5)
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pp. 2097-2113
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2012 ◽
Vol 9
(10)
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pp. 1618-1624