Low cost automatic test vector generation for structural analog testing

2017 18th IEEE Latin American Test Symposium (LATS) ◽

10.1109/latw.2017.7906740 ◽

2017 ◽

Author(s):

Andre L. Chinazzo ◽

Paulo C. Comassetto de Aguirre ◽

Tiago R. Balen

Keyword(s):

Low Cost ◽

Structural Analog ◽

Test Vector ◽

Automatic Test ◽

Analog Testing ◽

Vector Generation ◽

Test Vector Generation

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Observability-based coverage-directed path search using PBO for automatic test vector generation

2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsisoc.2009.6041346 ◽

2009 ◽

Cited By ~ 1

Author(s):

Jose C. Costa ◽

Jose C. Monteiro

Keyword(s):

Test Vector ◽

Directed Path ◽

Automatic Test ◽

Vector Generation ◽

Path Search ◽

Test Vector Generation

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Automatic test vector generation for mixed-signal circuits

Proceedings the European Design and Test Conference. ED&TC 1995 ◽

10.1109/edtc.1995.470320 ◽

2002 ◽

Cited By ~ 5

Author(s):

B. Ayari ◽

N. Ben Hamida ◽

B. Kaminska

Keyword(s):

Test Vector ◽

Automatic Test ◽

Mixed Signal ◽

Mixed Signal Circuits ◽

Vector Generation ◽

Test Vector Generation

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Automatic test vector generation for bridging faults detection in combinational circuits using false Boolean functions

Proceedings. International Semiconductor Conference ◽

10.1109/smicnd.2002.1105874 ◽

2003 ◽

Author(s):

M. Ionescu ◽

F. Ionescu

Keyword(s):

Boolean Functions ◽

Test Vector ◽

Combinational Circuits ◽

Bridging Faults ◽

Automatic Test ◽

Vector Generation ◽

Test Vector Generation

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Parametric fault simulation and test vector generation

Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) ◽

10.1109/date.2000.840855 ◽

2002 ◽

Cited By ~ 21

Author(s):

K. Saab ◽

N. Ben-Hamida ◽

B. Kaminska

Keyword(s):

Fault Simulation ◽

Test Vector ◽

Vector Generation ◽

Parametric Fault ◽

Test Vector Generation

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Ping-pong test: Compact test vector generation for reversible circuits

2012 IEEE 30th VLSI Test Symposium (VTS) ◽

10.1109/vts.2012.6231097 ◽

2012 ◽

Cited By ~ 10

Author(s):

Masoud Zamani ◽

Mehdi B. Tahoori ◽

Krishnendu Chakrabarty

Keyword(s):

Test Vector ◽

Reversible Circuits ◽

Vector Generation ◽

Ping Pong ◽

Test Vector Generation ◽

Compact Test

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On-Line Test Vector Generation from Temporal Regular Expressions

2006 6th International Workshop on System on Chip for Real Time Applications ◽

10.1109/iwsoc.2006.348223 ◽

2006 ◽

Author(s):

Yann Oddos ◽

Katell Morin-Allory ◽

Dominique Borrione

Keyword(s):

Regular Expressions ◽

Test Vector ◽

Vector Generation ◽

On Line ◽

Line Test ◽

Test Vector Generation

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Automation of Translating Unit-Level Verification Scenarios for Test Vector Generation of SoC

Intelligent Sustainable Systems - Lecture Notes in Networks and Systems ◽

10.1007/978-981-16-6309-3_50 ◽

2022 ◽

pp. 527-536

Author(s):

Rahul Anilkumar ◽

B. K. S. V. L. Varaprasad ◽

K. Padmapriya

Keyword(s):

Test Vector ◽

Unit Level ◽

Vector Generation ◽

Test Vector Generation

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Behavioral-level test vector generation for system-on-chip designs

Proceedings IEEE International High-Level Design Validation and Test Workshop (Cat. No.PR00786) ◽

10.1109/hldvt.2000.889554 ◽

2002 ◽

Cited By ~ 11

Author(s):

M. Lajolo ◽

M. Rebaudengo ◽

M.S. Reorda ◽

M. Violante ◽

L. Lavagno

Keyword(s):

System On Chip ◽

Test Vector ◽

Behavioral Level ◽

Vector Generation ◽

On Chip ◽

Test Vector Generation

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New Metric Based Algorithm for Test Vector Generation in VLSI Testing

Defence Science Journal ◽

10.14429/dsj.45.4132 ◽

1995 ◽

Vol 45 (3) ◽

pp. 255-265

Author(s):

M.V. Atre ◽

V. Latha

Keyword(s):

Test Vector ◽

Vlsi Testing ◽

Vector Generation ◽

Test Vector Generation

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An assembler approach to the automation of test vector generation

10.1109/asic.1990.186180 ◽

2002 ◽

Author(s):

K. Perrey ◽

M. Manley

Keyword(s):

Test Vector ◽

Vector Generation ◽

Test Vector Generation

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