VLSI-SoC: Design for Reliability, Security, and Low Power - IFIP Advances in Information and Communication Technology
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9783319460963, 9783319460970

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A Temperature-Aware Battery Cycle Life Model for Different Battery Chemistries

VLSI-SoC: Design for Reliability, Security, and Low Power - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-319-46097-0_6 ◽

2016 ◽

pp. 109-130

Author(s):

Alberto Bocca ◽

Alessandro Sassone ◽

Donghwa Shin ◽

Alberto Macii ◽

Enrico Macii ◽

...

Keyword(s):

Cycle Life ◽

Life Model

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A Hardware Accelerator for Real Time Sliding Window Based Pedestrian Detection on High Resolution Images

VLSI-SoC: Design for Reliability, Security, and Low Power - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-319-46097-0_3 ◽

2016 ◽

pp. 46-66 ◽

Cited By ~ 1

Author(s):

Asim Khan ◽

Muhammad Umar Karim Khan ◽

Muhammad Bilal ◽

Chong-Min Kyung

Keyword(s):

High Resolution ◽

Real Time ◽

Pedestrian Detection ◽

Sliding Window ◽

Hardware Accelerator ◽

High Resolution Images

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Automatic Generation and Qualification of Assertions on Control Signals: A Time Window-Based Approach

VLSI-SoC: Design for Reliability, Security, and Low Power - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-319-46097-0_10 ◽

2016 ◽

pp. 193-221 ◽

Cited By ~ 2

Author(s):

Alessandro Danese ◽

Francesca Filini ◽

Tara Ghasempouri ◽

Graziano Pravadelli

Keyword(s):

Time Window ◽

Automatic Generation ◽

Control Signals

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JAIP-MP: A Four-Core Java Application Processor for Embedded Systems

VLSI-SoC: Design for Reliability, Security, and Low Power - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-319-46097-0_9 ◽

2016 ◽

pp. 170-192

Author(s):

Chun-Jen Tsai ◽

Tsung-Han Wu ◽

Hung-Cheng Su ◽

Cheng-Yang Chen

Keyword(s):

Embedded Systems ◽

Java Application ◽

Application Processor

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Delay Testing Based on Multiple Faulty Behaviors

VLSI-SoC: Design for Reliability, Security, and Low Power - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-319-46097-0_5 ◽

2016 ◽

pp. 87-108

Author(s):

Masahiro Fujita

Keyword(s):

Delay Testing

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A SAR Pipeline ADC Embedding Time Interleaved DAC Sharing for Ultra-low Power Camera Front Ends

VLSI-SoC: Design for Reliability, Security, and Low Power - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-319-46097-0_7 ◽

2016 ◽

pp. 131-149

Author(s):

Anvesha Amaravati ◽

Manan Chugh ◽

Arijit Raychowdhury

Keyword(s):

Low Power ◽

Pipeline Adc ◽

Ultra Low Power ◽

Time Interleaved

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Electromagnetic Transmission of Intellectual Property Data to Protect FPGA Designs

VLSI-SoC: Design for Reliability, Security, and Low Power - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-319-46097-0_8 ◽

2016 ◽

pp. 150-169

Author(s):

Lilian Bossuet ◽

Pierre Bayon ◽

Viktor Fischer

Keyword(s):

Intellectual Property ◽

Property Data ◽

Electromagnetic Transmission

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On the Use of System-on-Chip Technology in Next-Generation Instruments Avionics for Space Exploration

VLSI-SoC: Design for Reliability, Security, and Low Power - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-319-46097-0_1 ◽

2016 ◽

pp. 1-22 ◽

Cited By ~ 2

Author(s):

Xabier Iturbe ◽

Didier Keymeulen ◽

Patrick Yiu ◽

Daniel Berisford ◽

Robert Carlson ◽

...

Keyword(s):

Space Exploration ◽

System On Chip ◽

Next Generation ◽

Chip Technology ◽

On Chip

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Wearable ECG SoC for Wireless Body Area Networks: Implementation with Fuzzy Decision Making Chip

VLSI-SoC: Design for Reliability, Security, and Low Power - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-319-46097-0_4 ◽

2016 ◽

pp. 67-86 ◽

Cited By ~ 1

Author(s):

Manikandan Pandiyan ◽

Geetha Mani

Keyword(s):

Decision Making ◽

Body Area Networks ◽

Wireless Body Area Networks ◽

Fuzzy Decision Making ◽

Fuzzy Decision ◽

Body Area

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Fault Collapsing in Digital Circuits Using Fast Fault Dominance and Equivalence Analysis with SSBDDs

VLSI-SoC: Design for Reliability, Security, and Low Power - IFIP Advances in Information and Communication Technology ◽

10.1007/978-3-319-46097-0_2 ◽

2016 ◽

pp. 23-45 ◽

Cited By ~ 2

Author(s):

Raimund Ubar ◽

Lembit Jürimägi ◽

Elmet Orasson ◽

Jaan Raik

Keyword(s):

Digital Circuits

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VLSI-SoC: Design for Reliability, Security, and Low Power - IFIP Advances in Information and Communication TechnologyLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer International Publishing

A Temperature-Aware Battery Cycle Life Model for Different Battery Chemistries

A Hardware Accelerator for Real Time Sliding Window Based Pedestrian Detection on High Resolution Images

Automatic Generation and Qualification of Assertions on Control Signals: A Time Window-Based Approach

JAIP-MP: A Four-Core Java Application Processor for Embedded Systems

Delay Testing Based on Multiple Faulty Behaviors

A SAR Pipeline ADC Embedding Time Interleaved DAC Sharing for Ultra-low Power Camera Front Ends

Electromagnetic Transmission of Intellectual Property Data to Protect FPGA Designs

On the Use of System-on-Chip Technology in Next-Generation Instruments Avionics for Space Exploration

Wearable ECG SoC for Wireless Body Area Networks: Implementation with Fuzzy Decision Making Chip

Fault Collapsing in Digital Circuits Using Fast Fault Dominance and Equivalence Analysis with SSBDDs

VLSI-SoC: Design for Reliability, Security, and Low Power - IFIP Advances in Information and Communication Technology
Latest Publications