Proceedings. IEEE Asia-Pacific Conference on ASIC,
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Structure configuration of low power register file using energy model

Proceedings. IEEE Asia-Pacific Conference on ASIC, ◽

10.1109/apasic.2002.1031527 ◽

2003 ◽

Cited By ~ 7

Author(s):

Xue-mei Zhao ◽

Yi-zheng Ye

Keyword(s):

Low Power ◽

Energy Model ◽

Structure Configuration

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A 2.5 Gbps CMOS data serializer

Proceedings. IEEE Asia-Pacific Conference on ASIC, ◽

10.1109/apasic.2002.1031535 ◽

2003 ◽

Cited By ~ 4

Author(s):

Meng-Tzer Wong ◽

Wei-Zen Chen

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A high performance function generator for multiplier-based arithmetic operations

Proceedings. IEEE Asia-Pacific Conference on ASIC, ◽

10.1109/apasic.2002.1031599 ◽

2003 ◽

Author(s):

Tso-Bing Juang ◽

Jeng-Hsin Jan ◽

Ming-Yu Tsai ◽

Shen-Fu Hsiao

Keyword(s):

High Performance ◽

Arithmetic Operations ◽

Function Generator ◽

Performance Function

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A low power CMOS adaptive line equalizer for fast Ethernet

Proceedings. IEEE Asia-Pacific Conference on ASIC, ◽

10.1109/apasic.2002.1031549 ◽

2003 ◽

Cited By ~ 1

Author(s):

Kwisung Yoo ◽

Hoon Lee ◽

Gunhee Han

Keyword(s):

Low Power ◽

Low Power Cmos ◽

Fast Ethernet

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Self-isolated gain-enhanced sense amplifier

Proceedings. IEEE Asia-Pacific Conference on ASIC, ◽

10.1109/apasic.2002.1031531 ◽

2003 ◽

Cited By ~ 4

Author(s):

Hong-Yi Huang ◽

Shih-Lun Chen

Keyword(s):

Sense Amplifier

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Low cost floating point arithmetic unit design

Proceedings. IEEE Asia-Pacific Conference on ASIC, ◽

10.1109/apasic.2002.1031571 ◽

2003 ◽

Cited By ~ 2

Author(s):

Seungchul Kim ◽

Yongjoo Lee ◽

Wookyeong Jeong ◽

Yongsurk Lee

Keyword(s):

Low Cost ◽

Floating Point ◽

Arithmetic Unit ◽

Floating Point Arithmetic ◽

Unit Design ◽

Point Arithmetic

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Low noise amplifier circuit for bandpass sampling

Proceedings. IEEE Asia-Pacific Conference on ASIC, ◽

10.1109/apasic.2002.1031579 ◽

2003 ◽

Cited By ~ 3

Author(s):

M. Nakao ◽

S. Takagi ◽

N. Fujii

Keyword(s):

Low Noise ◽

Low Noise Amplifier ◽

Amplifier Circuit ◽

Bandpass Sampling ◽

Noise Amplifier

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Power efficient MPEG-4 decoder architecture featuring low-complexity error resilience

Proceedings. IEEE Asia-Pacific Conference on ASIC, ◽

10.1109/apasic.2002.1031573 ◽

2003 ◽

Cited By ~ 2

Author(s):

H.I. Byun ◽

M.Y. Jeon ◽

J.Y. Seo ◽

K.W. Lee ◽

S.H. Lee ◽

...

Keyword(s):

Error Resilience ◽

Low Complexity ◽

Power Efficient ◽

Decoder Architecture

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A real-time lipreading LSI for word recognition

Proceedings. IEEE Asia-Pacific Conference on ASIC, ◽

10.1109/apasic.2002.1031592 ◽

2003 ◽

Cited By ~ 3

Author(s):

K. Nakamura ◽

N. Murakami ◽

K. Takagi ◽

N. Takagi

Keyword(s):

Word Recognition ◽

Real Time

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A programmable filter with self-tuning for DMT VDSL receiver

Proceedings. IEEE Asia-Pacific Conference on ASIC, ◽

10.1109/apasic.2002.1031547 ◽

2003 ◽

Cited By ~ 2

Author(s):

Chia-Hua Chou ◽

Chien-Chih Lin ◽

Chorng-Kuang Wang

Keyword(s):

Programmable Filter ◽

Self Tuning

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Proceedings. IEEE Asia-Pacific Conference on ASIC,Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Structure configuration of low power register file using energy model

A 2.5 Gbps CMOS data serializer

A high performance function generator for multiplier-based arithmetic operations

A low power CMOS adaptive line equalizer for fast Ethernet

Self-isolated gain-enhanced sense amplifier

Low cost floating point arithmetic unit design

Low noise amplifier circuit for bandpass sampling

Power efficient MPEG-4 decoder architecture featuring low-complexity error resilience

A real-time lipreading LSI for word recognition

A programmable filter with self-tuning for DMT VDSL receiver

Proceedings. IEEE Asia-Pacific Conference on ASIC,
Latest Publications