scholarly journals Static Power Consumption in CMOS Gates Using Independent Bodies

Author(s):  
D. Guerrero ◽  
A. Millan ◽  
J. Juan ◽  
M. J. Bellido ◽  
P. Ruiz-de-Clavijo ◽  
...  
2015 ◽  
Vol 25 (03) ◽  
pp. 1640013
Author(s):  
Miroslav Valka ◽  
Alberto Bosio ◽  
Luigi Dilillo ◽  
Patrick Girard ◽  
Arnaud Virazel ◽  
...  

Power gating techniques have been adopted so far to reduce the static power consumption of integrated circuits (ICs). Power gating is usually implemented by means of several power switches (PSs). Manufacturing defects affecting PSs can lead to increase in the actual static power consumption and, in the worst case, they can completely isolate a functional block in the IC. Thus, efficient test and diagnosis solutions are needed. In this paper, we present a novel Design for Test and Diagnosis (DfTD) solution able to increase the test quality and diagnosis accuracy of PSs. The proposed approach has been validated through SPICE simulations on ITC’99 benchmark circuits as well as on industrial test cases.


2019 ◽  
Vol 10 ◽  
pp. 136-141 ◽  
Author(s):  
Ashwani Kumar Yadav ◽  
Kartik Upadhyay ◽  
Palak Gandhi ◽  
Vaishali

2016 ◽  
Vol 25 (07) ◽  
pp. 1650075
Author(s):  
Wenbin Ye ◽  
Ya Jun Yu

In the design of low computational complexity and low power FIR filters, researchers have made every effort to reduce the number of adders when coefficients multipliers are considered as the multiple constant multiplication problem. In this paper, for the first time, we propose a power oriented optimization of linear phase FIR filters, where a power cost is used as the criteria in the discrete coefficient searches and synthesis. The power cost is computed based on a newly proposed power model, which takes both the static power and dynamic power into consideration. With the new power model, a new coefficient synthesis scheme is proposed such that the synthesized coefficient consumes the minimum power. Compared to the adder-cost oriented algorithm, the proposed power-oriented algorithm has two advantages: First, the algorithm can optimize filters with lower power consumption, and second, the optimal design in the sense of power consumption is frequency aware. Unlike the adder-cost oriented algorithms that generate the same final coefficient set and the same synthesis of the coefficient set regardless of the frequency for a given filter specification, the proposed algorithm search and synthesizes the coefficients with the awareness of the working frequency; different designs may be resulted for the same filter specification but different working frequency, and each designed filter has lower power consumption in its specified frequency. Transistor level simulations of benchmark filters verified the above claims.


Sensors ◽  
2019 ◽  
Vol 19 (23) ◽  
pp. 5063 ◽  
Author(s):  
Hsia ◽  
Hsiao ◽  
Huang

This article presents a high-voltage (HV) pulse driver based on silicon-on-insulator (SOI) technology for biomedical ultrasound actuators and multi-channel portable imaging systems specifically. The pulse driver, which receives an external low-voltage drive signal and produces high-voltage pulses with a balanced rising and falling edge, is designed by synthesizing high-speed, capacitor-coupled level-shifters with a high-voltage H-bridge output stage. In addition, an on-chip floating power supply has also been developed to simplify powering the entire system and reduce static power consumption. The electrical and acoustic performance of the integrated eight-channel pulse driver has been verified by using medical-grade ultrasound probes to acquire the transmit/echo signals. The driver can produce pulse signals >100 Vpp with rise and fall times within 18.6 and 18.5 ns, respectively. The static power required to support the overall system is less than 3.6 mW, and the power consumption of the system during excitation is less than 50 mW per channel. The second harmonic distortion of the output pulse signal is as low as −40 dBc, indicating that the integrated multi-channel pulse driver can be used in advanced portable ultrasonic imaging systems.


Sensors ◽  
2020 ◽  
Vol 20 (19) ◽  
pp. 5706
Author(s):  
Sanghoon Lee ◽  
Dongkyu Lee ◽  
Pyung Choi ◽  
Daejin Park

Light detection and ranging (LiDAR) sensors help autonomous vehicles detect the surrounding environment and the exact distance to an object’s position. Conventional LiDAR sensors require a certain amount of power consumption because they detect objects by transmitting lasers at a regular interval according to a horizontal angular resolution (HAR). However, because the LiDAR sensors, which continuously consume power inefficiently, have a fatal effect on autonomous and electric vehicles using battery power, power consumption efficiency needs to be improved. In this paper, we propose algorithms to improve the inefficient power consumption of conventional LiDAR sensors, and efficiently reduce power consumption in two ways: (a) controlling the HAR to vary the laser transmission period (TP) of a laser diode (LD) depending on the vehicle’s speed and (b) reducing the static power consumption using a sleep mode, depending on the surrounding environment. The proposed LiDAR sensor with the HAR control algorithm reduces the power consumption of the LD by 6.92% to 32.43% depending on the vehicle’s speed, compared to the maximum number of laser transmissions (Nx.max). The sleep mode with a surrounding environment-sensing algorithm reduces the power consumption by 61.09%. The algorithm of the proposed LiDAR sensor was tested on a commercial processor chip, and the integrated processor was designed as an IC using the Global Foundries 55 nm CMOS process.


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