ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures
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Published By IEEE

0780308573

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High-voltage termination-structure design using a test chip and two-dimensional simulation

ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures ◽

10.1109/icmts.1993.292896 ◽

2002 ◽

Author(s):

R.D. Schrimpf ◽

S.I. Kosier ◽

B. Salik ◽

K.F. Galloway ◽

C.F. Wheatley ◽

...

Keyword(s):

High Voltage ◽

Structure Design ◽

Two Dimensional ◽

Test Chip ◽

Dimensional Simulation

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Direct extraction of SPICE level 3 parameters without using optimization

ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures ◽

10.1109/icmts.1993.292902 ◽

2002 ◽

Author(s):

J.-i. Matsuda

Keyword(s):

Direct Extraction ◽

Level 3

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Junction evaluation by time dependent degradation due to high constant voltage stressing (DRAMs)

ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures ◽

10.1109/icmts.1993.292883 ◽

2002 ◽

Author(s):

J. Mitsuhashi ◽

J. Komori ◽

T. Eimori ◽

H. Koyama

Keyword(s):

Time Dependent ◽

Constant Voltage

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An implementation of CMOS design for testability techniques for non stuck-at faults

ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures ◽

10.1109/icmts.1993.292887 ◽

2002 ◽

Author(s):

M. Lanzoni ◽

M. Favalli ◽

P. Olivo ◽

B. Ricco

Keyword(s):

Design For Testability ◽

Cmos Design

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A low frequency AC method to measure the doping profile in the channel region of a MOSFET with general extendability to the semiconductor surface

ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures ◽

10.1109/icmts.1993.292880 ◽

2002 ◽

Author(s):

J.D. Kendall ◽

J.K. Kolk ◽

A.R. Boothroyd ◽

D.A. Vincent

Keyword(s):

Low Frequency ◽

Doping Profile ◽

Semiconductor Surface ◽

Channel Region

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A methodology for pre-determination of bipolar SPICE model parameters in BiCMOS technology

ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures ◽

10.1109/icmts.1993.292900 ◽

2002 ◽

Author(s):

S. Aggarwal ◽

A. Juge

Keyword(s):

Model Parameters ◽

Spice Model ◽

Bicmos Technology

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Modeling and characterization of MOSFET width dependencies

ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures ◽

10.1109/icmts.1993.292881 ◽

2002 ◽

Cited By ~ 11

Author(s):

R.A. Ashton ◽

P.A. Layman ◽

C.C. McAndrew

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Evaluations of leakage currents and capacitances on elementary CMOS devices

ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures ◽

10.1109/icmts.1993.292905 ◽

2002 ◽

Cited By ~ 3

Author(s):

P. Girard ◽

P. Nouet ◽

A. Khalkhal ◽

F.M. Roche

Keyword(s):

Leakage Currents

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Evaluation of metallization systems with test structures and yield modeling

ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures ◽

10.1109/icmts.1993.292891 ◽

2002 ◽

Cited By ~ 1

Author(s):

C.A. DeLoach ◽

H.G. Parks ◽

S.E. Beck

Keyword(s):

Yield Modeling

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Design considerations for a test structure which can be used to determine the optimum focus

ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures ◽

10.1109/icmts.1993.292907 ◽

2002 ◽

Cited By ~ 2

Author(s):

A.J. Walton ◽

M. Fallon ◽

J.T.M. Stevenson ◽

A.W.S. Ross

Keyword(s):

Test Structure ◽

Design Considerations

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ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test StructuresLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

High-voltage termination-structure design using a test chip and two-dimensional simulation

Direct extraction of SPICE level 3 parameters without using optimization

Junction evaluation by time dependent degradation due to high constant voltage stressing (DRAMs)

An implementation of CMOS design for testability techniques for non stuck-at faults

A low frequency AC method to measure the doping profile in the channel region of a MOSFET with general extendability to the semiconductor surface

A methodology for pre-determination of bipolar SPICE model parameters in BiCMOS technology

Modeling and characterization of MOSFET width dependencies

Evaluations of leakage currents and capacitances on elementary CMOS devices

Evaluation of metallization systems with test structures and yield modeling

Design considerations for a test structure which can be used to determine the optimum focus

ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures
Latest Publications