Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)

Electroceuticals - replacing drugs by devices enabled through advanced VLSI technologies

Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) ◽

10.1109/vlsi-tsa.2014.6839635 ◽

2014 ◽

Author(s):

David Prutchi

Stability/performance assessment of monolithic 3D 6T/8T SRAM cells considering transistor-level interlayer coupling

Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) ◽

10.1109/vlsi-tsa.2014.6839680 ◽

2014 ◽

Author(s):

Ming-Long Fan ◽

Vita Pi-Ho Hu ◽

Yin-Nien Chen ◽

Pin Su ◽

Ching-Te Chuang

Keyword(s):

Performance Assessment ◽

Interlayer Coupling ◽

Stability Performance

Influence of technological and geometrical parameters on low-frequency noise in SOI omega-gate nanowire NMOSFETs

Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) ◽

10.1109/vlsi-tsa.2014.6839653 ◽

2014 ◽

Cited By ~ 4

Author(s):

M. Koyama ◽

M. Casse ◽

R. Coquand ◽

S. Barraud ◽

G. Ghibaudo ◽

...

Keyword(s):

Low Frequency ◽

Geometrical Parameters ◽

Frequency Noise ◽

Low Frequency Noise

Low current cross-point memory using gadolinium-oxide switching material

Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) ◽

10.1109/vlsi-tsa.2014.6839686 ◽

2014 ◽

Author(s):

D. Jana ◽

S. Maikap ◽

Y.Y. Chen ◽

J.R. Yang

Keyword(s):

Gadolinium Oxide ◽

Cross Point ◽

Switching Material

The resilience wall: Cross-layer solution strategies

Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) ◽

10.1109/vlsi-tsa.2014.6839639 ◽

2014 ◽

Cited By ~ 4

Author(s):

Subhasish Mitra ◽

Pradip Bose ◽

Eric Cheng ◽

Chen-Yong Cher ◽

Hyungmin Cho ◽

...

Keyword(s):

Cross Layer ◽

Solution Strategies ◽

Layer Solution

High-density nano-pillar SiOx-based resistive switching memory using nano-sphere lithography to fabricate a one diode - one resistor (1D-1R) architecture

Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) ◽

10.1109/vlsi-tsa.2014.6839674 ◽

2014 ◽

Cited By ~ 2

Author(s):

Y. F. Chang ◽

L. Ji ◽

Y. C. Chen ◽

F. Zhou ◽

T. M. Tsai ◽

...

Keyword(s):

Resistive Switching ◽

High Density ◽

Resistive Switching Memory ◽

Switching Memory

Improved multi-level control of RRAM using pulse-train programming

Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) ◽

10.1109/vlsi-tsa.2014.6839673 ◽

2014 ◽

Cited By ~ 3

Author(s):

Liang Zhao ◽

Hong-Yu Chen ◽

Shih-Chieh Wu ◽

Zizhen Jiang ◽

Shimeng Yu ◽

...

Keyword(s):

Pulse Train ◽

Level Control ◽

Multi Level

Exploring technology solution paths for expaned 3D devices, interconnects and system integrations beyond TSV

Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) ◽

10.1109/vlsi-tsa.2014.6839702 ◽

2014 ◽

Cited By ~ 1

Author(s):

Herb Huang

Keyword(s):

Technology Solution

More than Moore foundry: Challenges for process technology, process characterization and design enablement to address complex cyber physical systems in harsh environments

Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) ◽

10.1109/vlsi-tsa.2014.6839699 ◽

2014 ◽

Author(s):

Steven Chen

Keyword(s):

Cyber Physical Systems ◽

Harsh Environments ◽

Process Technology ◽

Physical Systems ◽

Process Characterization ◽

Technology Process

Self-convergent trimming of embedded logic compatible OTP memory for VT variation reduction in low voltage SRAMs

Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) ◽

10.1109/vlsi-tsa.2014.6839666 ◽

2014 ◽

Author(s):

Sheng-Yen Chien ◽

Po Yen Lin ◽

Hung-Yu Chen ◽

Chrong Jung Lin ◽

Ya-Chin King

Keyword(s):

Low Voltage ◽

Variation Reduction

Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)
Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Electroceuticals - replacing drugs by devices enabled through advanced VLSI technologies

Stability/performance assessment of monolithic 3D 6T/8T SRAM cells considering transistor-level interlayer coupling

Influence of technological and geometrical parameters on low-frequency noise in SOI omega-gate nanowire NMOSFETs

Low current cross-point memory using gadolinium-oxide switching material

The resilience wall: Cross-layer solution strategies

High-density nano-pillar SiOx-based resistive switching memory using nano-sphere lithography to fabricate a one diode - one resistor (1D-1R) architecture

Improved multi-level control of RRAM using pulse-train programming

Exploring technology solution paths for expaned 3D devices, interconnects and system integrations beyond TSV

More than Moore foundry: Challenges for process technology, process characterization and design enablement to address complex cyber physical systems in harsh environments

Self-convergent trimming of embedded logic compatible OTP memory for VT variation reduction in low voltage SRAMs

Export Citation Format

Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Electroceuticals - replacing drugs by devices enabled through advanced VLSI technologies

Stability/performance assessment of monolithic 3D 6T/8T SRAM cells considering transistor-level interlayer coupling

Influence of technological and geometrical parameters on low-frequency noise in SOI omega-gate nanowire NMOSFETs

Low current cross-point memory using gadolinium-oxide switching material

The resilience wall: Cross-layer solution strategies

High-density nano-pillar SiOx-based resistive switching memory using nano-sphere lithography to fabricate a one diode - one resistor (1D-1R) architecture

Improved multi-level control of RRAM using pulse-train programming

Exploring technology solution paths for expaned 3D devices, interconnects and system integrations beyond TSV

More than Moore foundry: Challenges for process technology, process characterization and design enablement to address complex cyber physical systems in harsh environments

Self-convergent trimming of embedded logic compatible OTP memory for VT variation reduction in low voltage SRAMs

Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)
Latest Publications