2007 IEEE International Interconnect Technology Conferencee
Latest Publications

TOTAL DOCUMENTS

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

142441069x

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Robust integration of an ULK SiOCH dielectric (k=2.3) for high performance 32nm node BEOL

2007 IEEE International Interconnect Technology Conferencee ◽

10.1109/iitc.2007.382382 ◽

2007 ◽

Cited By ~ 2

Author(s):

M. Aimadeddine ◽

P. Maury ◽

V. Delaye ◽

N. Jourdan ◽

T. Vanypre ◽

...

Keyword(s):

High Performance ◽

Robust Integration

IEEE 2007 International Interconnect Technology Conference

2007 IEEE International Interconnect Technology Conferencee ◽

10.1109/iitc.2007.382323 ◽

2007 ◽

Keyword(s):

Interconnect Technology

Three dimensional chip stacking using a wafer-to-wafer integration

2007 IEEE International Interconnect Technology Conferencee ◽

10.1109/iitc.2007.382355 ◽

2007 ◽

Cited By ~ 27

Author(s):

Ritwik Chatterjee ◽

Marc Zussy ◽

Antonio Roman ◽

Olivier Louveau ◽

Sylvain Maitrejean ◽

...

Keyword(s):

Three Dimensional

A comparative study of thermal and plasma enhanced ALD Ta-N-C films on SiO2, SiCOH and Cu substrates

2007 IEEE International Interconnect Technology Conferencee ◽

10.1109/iitc.2007.382335 ◽

2007 ◽

Author(s):

H. Wojcik ◽

M. Friedemann ◽

F. Feustel ◽

M. Albert ◽

S. Ohsiek ◽

...

Keyword(s):

Comparative Study ◽

Cu Substrates

The critical role of the metal / porous low-k interface in post direct CMP defectivity generation and resulting ULK surface and bulk hydrophilisation

2007 IEEE International Interconnect Technology Conferencee ◽

10.1109/iitc.2007.382379 ◽

2007 ◽

Cited By ~ 1

Author(s):

Y. Travaly ◽

F. Sinapi ◽

N. Heylen ◽

A. Humbert ◽

M. Delande ◽

...

Keyword(s):

Critical Role ◽

Low K

An alternative low resistance MOL technology with electroplated rhodium as contact plugs for 32nm CMOS and beyond

2007 IEEE International Interconnect Technology Conferencee ◽

10.1109/iitc.2007.382360 ◽

2007 ◽

Cited By ~ 4

Author(s):

I. Shao ◽

J.M. Cotte ◽

B. Haran ◽

A.W. Topol ◽

E.E. Simonyi ◽

...

Keyword(s):

Low Resistance

Stress and Slurry Chemistry Effects on CMP Damage of Ultra-Low-k Dielectrics

2007 IEEE International Interconnect Technology Conferencee ◽

10.1109/iitc.2007.382373 ◽

2007 ◽

Cited By ~ 2

Author(s):

Taek-Soo Kim ◽

Qiping Zhong ◽

Maria Peterson ◽

Halbert Tam ◽

Tomohisa Konno ◽

...

Keyword(s):

Low K

Challenges for 3D IC integration: bonding quality and thermal management

2007 IEEE International Interconnect Technology Conferencee ◽

10.1109/iitc.2007.382392 ◽

2007 ◽

Cited By ~ 50

Author(s):

Patrick Leduc ◽

Nicolas Sillon ◽

Sylvain Maitrejean ◽

Didier Louis ◽

Gerard Passemard ◽

...

Keyword(s):

Thermal Management ◽

3D Ic ◽

Bonding Quality

Impact of TaN/Ta copper barrier on full PEALD TiN/Ta2O5/TiN 3D damascene MIM capacitor performance

2007 IEEE International Interconnect Technology Conferencee ◽

10.1109/iitc.2007.382377 ◽

2007 ◽

Cited By ~ 2

Author(s):

M. Thomas ◽

A. Farcy ◽

E. Deloffre ◽

M. Gros-Jean ◽

C. Perrot ◽

...

Keyword(s):

Capacitor Performance

Electrical Properties of Carbon Nanotube Via Interconnects Fabricated by Novel Damascene Process

2007 IEEE International Interconnect Technology Conferencee ◽

10.1109/iitc.2007.382390 ◽

2007 ◽

Cited By ~ 22

Author(s):

Mizuhisa Nihei ◽

Takashi Hyakushima ◽

Shintaro Sato ◽

Tatsuhiro Nozue ◽

Masaaki Norimatsu ◽

...

Keyword(s):

Carbon Nanotube ◽

Electrical Properties ◽

Damascene Process

2007 IEEE International Interconnect Technology ConferenceeLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Robust integration of an ULK SiOCH dielectric (k=2.3) for high performance 32nm node BEOL

IEEE 2007 International Interconnect Technology Conference

Three dimensional chip stacking using a wafer-to-wafer integration

A comparative study of thermal and plasma enhanced ALD Ta-N-C films on SiO2, SiCOH and Cu substrates

The critical role of the metal / porous low-k interface in post direct CMP defectivity generation and resulting ULK surface and bulk hydrophilisation

An alternative low resistance MOL technology with electroplated rhodium as contact plugs for 32nm CMOS and beyond

Stress and Slurry Chemistry Effects on CMP Damage of Ultra-Low-k Dielectrics

Challenges for 3D IC integration: bonding quality and thermal management

Impact of TaN/Ta copper barrier on full PEALD TiN/Ta2O5/TiN 3D damascene MIM capacitor performance

Electrical Properties of Carbon Nanotube Via Interconnects Fabricated by Novel Damascene Process

2007 IEEE International Interconnect Technology Conferencee
Latest Publications