Sleep Switch Dual Threshold Voltage Domino Logic

2008 ◽

Vol 16 (5) ◽

pp. 594-598 ◽

Cited By ~ 11

Author(s):

Chua-Chin Wang ◽

Chi-Chun Huang ◽

Ching-Li Lee ◽

Tsai-Wen Cheng

Keyword(s):

Low Power ◽

Threshold Voltage ◽

High Speed ◽

Domino Logic ◽

Dual Threshold Voltage

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Pass transistor with dual threshold voltage domino logic design using standby switch for reduced subthreshold leakage current

Microelectronics Journal ◽

10.1016/j.mejo.2013.06.008 ◽

2013 ◽

Vol 44 (12) ◽

pp. 1099-1106 ◽

Cited By ~ 4

Author(s):

Shoucai Yuan ◽

Yuan Li ◽

Yifang Yuan ◽

Yamei Liu

Keyword(s):

Leakage Current ◽

Threshold Voltage ◽

Logic Design ◽

Domino Logic ◽

Subthreshold Leakage ◽

Pass Transistor ◽

Dual Threshold Voltage

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Transistor sizing for reliable domino logic design in dual threshold voltage technologies

Proceedings of the 11th Great Lakes Symposium on VLSI - GLSVLSI '01 ◽

10.1145/368122.368900 ◽

2001 ◽

Cited By ~ 1

Author(s):

Seong-Ook Jung ◽

Ki-Wook Kim ◽

Sung-Mo Steve Kang

Keyword(s):

Threshold Voltage ◽

Logic Design ◽

Domino Logic ◽

Transistor Sizing ◽

Dual Threshold Voltage

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Sleep switch dual threshold Voltage domino logic with reduced standby leakage current

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2004.826198 ◽

2004 ◽

Vol 12 (5) ◽

pp. 485-496 ◽

Cited By ~ 49

Author(s):

V. Kursun ◽

E.G. Friedman

Keyword(s):

Leakage Current ◽

Threshold Voltage ◽

Domino Logic ◽

Dual Threshold Voltage

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Sleep switch dual threshold voltage domino logic with reduced subthreshold and gate oxide leakage current

Microelectronics Journal ◽

10.1016/j.mejo.2006.01.001 ◽

2006 ◽

Vol 37 (8) ◽

pp. 812-820 ◽

Cited By ~ 9

Author(s):

Zhiyu Liu ◽

Volkan Kursun

Keyword(s):

Leakage Current ◽

Threshold Voltage ◽

Gate Oxide ◽

Domino Logic ◽

Dual Threshold Voltage

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Dual threshold voltage and sleep switch dual threshold voltage DOIND approach for leakage reduction in domino logic circuits

Microsystem Technologies ◽

10.1007/s00542-017-3437-2 ◽

2017 ◽

Vol 25 (5) ◽

pp. 1639-1652 ◽

Cited By ~ 3

Author(s):

Ambika Prasad Shah ◽

Vaibhav Neema ◽

Shreeniwas Daulatabad ◽

Praveen Singh

Keyword(s):

Threshold Voltage ◽

Logic Circuits ◽

Domino Logic ◽

Leakage Reduction ◽

Dual Threshold Voltage

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PMOS-Only Sleep Switch Dual-Threshold Voltage Domino Logic in Sub-65-nm CMOS Technologies

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2007.903947 ◽

2007 ◽

Vol 15 (12) ◽

pp. 1311-1319 ◽

Cited By ~ 16

Author(s):

Zhiyu Liu ◽

V. Kursun

Keyword(s):

Threshold Voltage ◽

Domino Logic ◽

Dual Threshold Voltage

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A low-power dual threshold voltage-voltage scaling technique for domino logic circuits

10.1109/icccnt.2012.6395896 ◽

2012 ◽

Cited By ~ 3

Author(s):

P. Arun ◽

S. Ramasamy

Keyword(s):

Low Power ◽

Threshold Voltage ◽

Logic Circuits ◽

Voltage Scaling ◽

Domino Logic ◽

Scaling Technique ◽

Dual Threshold Voltage

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Dual threshold voltage domino logic synthesis for high performance with noise and power constraint

Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition ◽

10.1109/date.2002.998282 ◽

2003 ◽

Author(s):

Seong-Ook Jung ◽

Ki-Wook Kim ◽

Sung-Mo Kang

Keyword(s):

Threshold Voltage ◽

High Performance ◽

Logic Synthesis ◽

Power Constraint ◽

Domino Logic ◽

Dual Threshold Voltage

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Low swing dual threshold voltage domino logic

Proceedings of the 12th ACM Great Lakes Symposium on VLSI - GLSVLSI '02 ◽

10.1145/505306.505317 ◽

2002 ◽

Cited By ~ 24

Author(s):

Volkan Kursun ◽

Eby G. Friedman

Keyword(s):

Threshold Voltage ◽

Domino Logic ◽

Dual Threshold Voltage

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Sleep Switch Dual Threshold Voltage Domino Logic

A Low Power High-Speed 8-Bit Pipelining CLA Design Using Dual-Threshold Voltage Domino Logic

Pass transistor with dual threshold voltage domino logic design using standby switch for reduced subthreshold leakage current

Transistor sizing for reliable domino logic design in dual threshold voltage technologies

Sleep switch dual threshold Voltage domino logic with reduced standby leakage current

Sleep switch dual threshold voltage domino logic with reduced subthreshold and gate oxide leakage current

Dual threshold voltage and sleep switch dual threshold voltage DOIND approach for leakage reduction in domino logic circuits

PMOS-Only Sleep Switch Dual-Threshold Voltage Domino Logic in Sub-65-nm CMOS Technologies

A low-power dual threshold voltage-voltage scaling technique for domino logic circuits

Dual threshold voltage domino logic synthesis for high performance with noise and power constraint

Low swing dual threshold voltage domino logic

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