Transistor sizing for reliable domino logic design in dual threshold voltage technologies

Proceedings of the 11th Great Lakes Symposium on VLSI - GLSVLSI '01 ◽

10.1145/368122.368900 ◽

2001 ◽

Author(s):

Seong-Ook Jung ◽

Ki-Wook Kim ◽

Sung-Mo Steve Kang

Keyword(s):

Threshold Voltage ◽

Logic Design ◽

Domino Logic ◽

Transistor Sizing ◽

Dual Threshold Voltage

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Pass transistor with dual threshold voltage domino logic design using standby switch for reduced subthreshold leakage current

Microelectronics Journal ◽

10.1016/j.mejo.2013.06.008 ◽

2013 ◽

Vol 44 (12) ◽

pp. 1099-1106 ◽

Author(s):

Shoucai Yuan ◽

Yuan Li ◽

Yifang Yuan ◽

Yamei Liu

Keyword(s):

Leakage Current ◽

Threshold Voltage ◽

Logic Design ◽

Domino Logic ◽

Subthreshold Leakage ◽

Pass Transistor ◽

Dual Threshold Voltage

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A Low Power High-Speed 8-Bit Pipelining CLA Design Using Dual-Threshold Voltage Domino Logic

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2008.917561 ◽

2008 ◽

Vol 16 (5) ◽

pp. 594-598 ◽

Author(s):

Chua-Chin Wang ◽

Chi-Chun Huang ◽

Ching-Li Lee ◽

Tsai-Wen Cheng

Keyword(s):

Low Power ◽

Threshold Voltage ◽

Domino Logic ◽

Dual Threshold Voltage

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Standby power optimization via transistor sizing and dual threshold voltage assignment

IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002. ◽

10.1145/774572.774628 ◽

2002 ◽

Author(s):

Mahesh Ketkar ◽

Sachin S. Sapatnekar

Keyword(s):

Threshold Voltage ◽

Power Optimization ◽

Transistor Sizing ◽

Standby Power ◽

Dual Threshold Voltage

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Standby power optimization via transistor sizing and dual threshold voltage assignment

IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002. ◽

10.1109/iccad.2002.1167561 ◽

2003 ◽

Author(s):

M. Ketkar ◽

S.S. Sapatnekar

Keyword(s):

Threshold Voltage ◽

Power Optimization ◽

Transistor Sizing ◽

Standby Power ◽

Dual Threshold Voltage

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Sleep switch dual threshold Voltage domino logic with reduced standby leakage current

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2004.826198 ◽

2004 ◽

Vol 12 (5) ◽

pp. 485-496 ◽

Author(s):

V. Kursun ◽

E.G. Friedman

Keyword(s):

Leakage Current ◽

Threshold Voltage ◽

Domino Logic ◽

Dual Threshold Voltage

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Dual-threshold voltage assignment with transistor sizing for low power CMOS circuits

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/92.924061 ◽

2001 ◽

Vol 9 (2) ◽

pp. 390-394 ◽

Author(s):

P. Pant ◽

R.K. Roy ◽

A. Chattejee

Keyword(s):

Low Power ◽

Threshold Voltage ◽

Cmos Circuits ◽

Transistor Sizing ◽

Low Power Cmos ◽

Dual Threshold Voltage

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Sleep Switch Dual Threshold Voltage Domino Logic

Multi-Voltage CMOS Circuit Design ◽

10.1002/0470033371.ch11 ◽

2006 ◽

pp. 187-204

Keyword(s):

Threshold Voltage ◽

Domino Logic ◽

Dual Threshold Voltage

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Sleep switch dual threshold voltage domino logic with reduced subthreshold and gate oxide leakage current

Microelectronics Journal ◽

10.1016/j.mejo.2006.01.001 ◽

2006 ◽

Vol 37 (8) ◽

pp. 812-820 ◽

Author(s):

Zhiyu Liu ◽

Volkan Kursun

Keyword(s):

Leakage Current ◽

Threshold Voltage ◽

Domino Logic ◽

Dual Threshold Voltage

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Dual threshold voltage and sleep switch dual threshold voltage DOIND approach for leakage reduction in domino logic circuits

Microsystem Technologies ◽

10.1007/s00542-017-3437-2 ◽

2017 ◽

Vol 25 (5) ◽

pp. 1639-1652 ◽

Author(s):

Ambika Prasad Shah ◽

Vaibhav Neema ◽

Shreeniwas Daulatabad ◽

Praveen Singh

Keyword(s):

Threshold Voltage ◽

Logic Circuits ◽

Domino Logic ◽

Leakage Reduction ◽

Dual Threshold Voltage

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PMOS-Only Sleep Switch Dual-Threshold Voltage Domino Logic in Sub-65-nm CMOS Technologies

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2007.903947 ◽

2007 ◽

Vol 15 (12) ◽

pp. 1311-1319 ◽

Author(s):

Zhiyu Liu ◽

V. Kursun

Keyword(s):

Threshold Voltage ◽

Domino Logic ◽

Dual Threshold Voltage

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