Synthesis and Characterization of Volatile, Fluorine-Free β-Ketoiminate Lanthanoid MOCVD Precursors and Their Implementation in Low-Temperature Growth of Epitaxial CeO2 Buffer Layers for Superconducting Electronics

ChemInform ◽  
2004 ◽  
Vol 35 (40) ◽  
Author(s):  
Anirudh Singh ◽  
Ram C. Mehrotra
Keyword(s):  
Low Temperature ◽  
Buffer Layers ◽  
Synthesis And Characterization ◽  
Temperature Growth ◽  
Low Temperature Growth ◽  
Mocvd Precursors ◽  
Superconducting Electronics

Short-period (Si14 / Si0.75 Ge0.25)20 Superlattices for the Growth of High-quality Si0.75 Ge0.25

2003 ◽  
Vol 765 ◽  
Author(s):  
M.M. Rahman ◽  
T. Tambo ◽  
C. Tatsuyama
Keyword(s):  
Low Temperature ◽  
Alloy Layer ◽  
Buffer Layers ◽  
Threading Dislocations ◽  
Strained Layers ◽  
Temperature Growth ◽  
Low Temperature Growth ◽  
Defect Sites ◽  
Short Period ◽  
Different Temperatures

AbstractIn the present experiment, we have grown 2500-Å thick Si0.75Ge0.25 alloy layers on Si(001) substrate by MBE process using a short-period (Si14/Si0.75Ge0.25)20 superlattice (SL) as buffer layers. In the SL layers, first a layer of 14 monolayers (MLs) of Si (thickness about 20Å) then a thin layer of Si0.75Ge0.25 (thickness 5-6Å) were grown. This Si/(Si0.75Ge0.25) bilayers were repeated for 20 times. The buffer layers were grown at different temperatures from 300-400°C and the alloy layers were then grown at 500°C on the buffer layers. The alloy layer showed low residual strain (about -0.16%) and smooth surface (rms roughness ~15Å) with 300°C grown SL buffer. Low temperature growth of Si in SL layer introduces point defects and low temperature growth of Si1-xGex in SL layer reduces the Ge segregation length, which leads to strained SL layer formation. Strained layers are capable to make barrier for the propagation of threading dislocations and point defect sites can trap the dislocations.

Low temperature growth of Ge1−xSnx buffer layers for tensile–strained Ge layers

2010 ◽  
Vol 518 (6) ◽  
pp. S2-S5 ◽  
Author(s):  
Yosuke Shimura ◽  
Norimasa Tsutsui ◽  
Osamu Nakatsuka ◽  
Akira Sakai ◽  
Shigeaki Zaima
Keyword(s):  
Low Temperature ◽  
Buffer Layers ◽  
Temperature Growth ◽  
Low Temperature Growth

Low-Temperature Growth and Characterization of Epitaxial YMnO3/Y2O3/Si MFIS Capacitors with Thinner Insulator Layer

2005 ◽  
Vol 44 (9B) ◽  
pp. 6977-6980 ◽  
Author(s):  
Kohei Haratake ◽  
Norimichi Shigemitsu ◽  
Masanori Nishijima ◽  
Takeshi Yoshimura ◽  
Nirufumi Fujimura
Keyword(s):  
Low Temperature ◽  
Insulator Layer ◽  
Temperature Growth ◽  
Low Temperature Growth

Low-Temperature Growth and Characterization of Cl-Doped ZnO Nanowire Arrays

2008 ◽  
Vol 112 (12) ◽  
pp. 4475-4479 ◽  
Author(s):  
J. B. Cui ◽  
Y. C. Soo ◽  
T. P. Chen ◽  
U. J. Gibson
Keyword(s):  
Low Temperature ◽  
Nanowire Arrays ◽  
Zno Nanowire ◽  
Temperature Growth ◽  
Low Temperature Growth ◽  
Zno Nanowire Arrays ◽  
Doped Zno
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