Electrical modeling of carbon nanotube‐based shielded through‐silicon vias for three‐dimensional integrated circuits

2020 ◽  
Author(s):  
Qing‐Hao Hu ◽  
Wen‐Sheng Zhao ◽  
Kai Fu ◽  
Da‐Wei Wang ◽  
Gaofeng Wang
Keyword(s):  
Carbon Nanotube ◽  
Integrated Circuits ◽  
Three Dimensional ◽  
Through Silicon Vias ◽  
Electrical Modeling ◽  
Silicon Vias

Modelling of crosstalk in differential through silicon vias for three‐dimensional integrated circuits

2019 ◽  
Vol 13 (10) ◽  
pp. 1529-1535
Author(s):  
Jin‐Wei Pan ◽  
Kai Fu ◽  
Qi Liu ◽  
Wen‐Sheng Zhao ◽  
Linxi Dong ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Three Dimensional ◽  
Through Silicon Vias ◽  
Silicon Vias

Copper Anisotropy Effects in Three-Dimensional Integrated Circuits Using Through-Silicon Vias

2012 ◽  
Vol 12 (2) ◽  
pp. 225-232 ◽  
Author(s):  
Aditya P. Karmarkar ◽  
Xiaopeng Xu ◽  
Kong-Boon Yeap ◽  
Ehrenfried Zschech
Keyword(s):  
Integrated Circuits ◽  
Three Dimensional ◽  
Through Silicon Vias ◽  
Silicon Vias

Electrical modeling and characterization of through-silicon vias (TSVs) for 3-D integrated circuits

2010 ◽  
Vol 41 (1) ◽  
pp. 9-16 ◽  
Author(s):  
Ioannis Savidis ◽  
Syed M. Alam ◽  
Ankur Jain ◽  
Scott Pozder ◽  
Robert E. Jones ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Through Silicon Vias ◽  
Electrical Modeling ◽  
Silicon Vias

Parasitic effects of air-gap through-silicon vias in high-speed three-dimensional integrated circuits

2016 ◽  
Vol 25 (11) ◽  
pp. 118401
Author(s):  
Xiaoxian Liu ◽  
Zhangming Zhu ◽  
Yintang Yang ◽  
Ruixue Ding ◽  
Yuejin Li
Keyword(s):  
Integrated Circuits ◽  
High Speed ◽  
Three Dimensional ◽  
Air Gap ◽  
Through Silicon Vias ◽  
Parasitic Effects ◽  
Silicon Vias
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