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Low-Loss Air-Cavity Through-Silicon Vias (TSVs) for High Speed Three-Dimensional Integrated Circuits (3-D ICs)
IEEE Microwave and Wireless Components Letters
◽
10.1109/lmwc.2016.2517325
◽
2016
◽
Vol 26
(2)
◽
pp. 89-91
◽
Cited By ~ 10
Author(s):
Xiaoxian Liu
◽
Zhangming Zhu
◽
Yintang Yang
◽
Ruixue Ding
Keyword(s):
Integrated Circuits
◽
High Speed
◽
Three Dimensional
◽
Low Loss
◽
Air Cavity
◽
Through Silicon Vias
◽
Silicon Vias
Download Full-text
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Parasitic effects of air-gap through-silicon vias in high-speed three-dimensional integrated circuits
Chinese Physics B
◽
10.1088/1674-1056/25/11/118401
◽
2016
◽
Vol 25
(11)
◽
pp. 118401
Author(s):
Xiaoxian Liu
◽
Zhangming Zhu
◽
Yintang Yang
◽
Ruixue Ding
◽
Yuejin Li
Keyword(s):
Integrated Circuits
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High Speed
◽
Three Dimensional
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Through Silicon Vias
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Parasitic Effects
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On Through Silicon Vias as used in three dimensional integrated circuits
2013 4th Annual International Conference on Energy Aware Computing Systems and Applications (ICEAC)
◽
10.1109/iceac.2013.6737650
◽
2013
◽
Author(s):
Robert Minvielle
◽
Magdy Bayoumi
Keyword(s):
Integrated Circuits
◽
Three Dimensional
◽
Through Silicon Vias
◽
Silicon Vias
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Prospective graphene-based through silicon vias in three-dimensional integrated circuits
VLSI and Post-CMOS Electronics. Volume 2: Devices, circuits and interconnects
◽
10.1049/pbcs073g_ch11
◽
2019
◽
pp. 223-246
Keyword(s):
Integrated Circuits
◽
Three Dimensional
◽
Through Silicon Vias
◽
Silicon Vias
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ANALYTICAL MODELING AND ANALYSIS OF THROUGH SILICON VIAS (TSVS) IN HIGH SPEED THREE-DIMENSIONAL SYSTEM INTEGRATION
Progress In Electromagnetics Research M
◽
10.2528/pierm15021404
◽
2015
◽
Vol 42
◽
pp. 49-59
◽
Cited By ~ 3
Author(s):
Md Amimul Ehsan
◽
Zhen Zhou
◽
Yang Yi
Keyword(s):
System Integration
◽
High Speed
◽
Analytical Modeling
◽
Three Dimensional
◽
Dimensional System
◽
Through Silicon Vias
◽
Modeling And Analysis
◽
Silicon Vias
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Three Dimensional System
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Modelling of crosstalk in differential through silicon vias for three‐dimensional integrated circuits
IET Microwaves Antennas & Propagation
◽
10.1049/iet-map.2018.5297
◽
2019
◽
Vol 13
(10)
◽
pp. 1529-1535
Author(s):
Jin‐Wei Pan
◽
Kai Fu
◽
Qi Liu
◽
Wen‐Sheng Zhao
◽
Linxi Dong
◽
...
Keyword(s):
Integrated Circuits
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Three Dimensional
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Through Silicon Vias
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Silicon Vias
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Copper Anisotropy Effects in Three-Dimensional Integrated Circuits Using Through-Silicon Vias
IEEE Transactions on Device and Materials Reliability
◽
10.1109/tdmr.2012.2189401
◽
2012
◽
Vol 12
(2)
◽
pp. 225-232
◽
Cited By ~ 9
Author(s):
Aditya P. Karmarkar
◽
Xiaopeng Xu
◽
Kong-Boon Yeap
◽
Ehrenfried Zschech
Keyword(s):
Integrated Circuits
◽
Three Dimensional
◽
Through Silicon Vias
◽
Silicon Vias
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Power bumps and through‐silicon‐vias placement with optimised power mesh structure for power delivery network in three‐dimensional‐integrated circuits
IET Computers & Digital Techniques
◽
10.1049/iet-cdt.2012.0047
◽
2013
◽
Vol 7
(1)
◽
pp. 11-20
◽
Cited By ~ 3
Author(s):
Cheoljon Jang
◽
Jaehwan Kim
◽
Byunggyu Ahn
◽
Jongwha Chong
Keyword(s):
Integrated Circuits
◽
Three Dimensional
◽
Power Delivery
◽
Through Silicon Vias
◽
Mesh Structure
◽
Power Delivery Network
◽
Silicon Vias
◽
Delivery Network
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Electrical modeling of carbon nanotube‐based shielded through‐silicon vias for three‐dimensional integrated circuits
International Journal of Numerical Modelling Electronic Networks Devices and Fields
◽
10.1002/jnm.2842
◽
2020
◽
Author(s):
Qing‐Hao Hu
◽
Wen‐Sheng Zhao
◽
Kai Fu
◽
Da‐Wei Wang
◽
Gaofeng Wang
Keyword(s):
Carbon Nanotube
◽
Integrated Circuits
◽
Three Dimensional
◽
Through Silicon Vias
◽
Electrical Modeling
◽
Silicon Vias
Download Full-text
Design space exploration of Through Silicon Vias for high-speed, low loss vertical links
2014 IEEE Electrical Design of Advanced Packaging & Systems Symposium (EDAPS)
◽
10.1109/edaps.2014.7030802
◽
2014
◽
Cited By ~ 3
Author(s):
Somesh Kumar
◽
Sarabjeet Kaur
◽
Mayank Bakshi
◽
Mohit Bansal
◽
Mohan Choudhary
◽
...
Keyword(s):
High Speed
◽
Design Space Exploration
◽
Design Space
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Space Exploration
◽
Low Loss
◽
Through Silicon Vias
◽
Silicon Vias
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Compact modelling of Through-Silicon Vias (TSVs) in three-dimensional (3-D) integrated circuits
2009 IEEE International Conference on 3D System Integration
◽
10.1109/3dic.2009.5306541
◽
2009
◽
Cited By ~ 61
Author(s):
Roshan Weerasekera
◽
Matt Grange
◽
Dinesh Pamunuwa
◽
Hannu Tenhunen
◽
Li-Rong Zheng
Keyword(s):
Integrated Circuits
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Three Dimensional
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Through Silicon Vias
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Silicon Vias
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