A planar rhombic antenna with a broad circular polarization bandwidth for integrated single chip radio transceivers

2009 ◽  
Vol 51 (6) ◽  
pp. 1493-1496 ◽  
Author(s):  
Ang Yu ◽  
Fan Yang ◽  
Atef Z. Elsherbeni
2013 ◽  
Vol 380-384 ◽  
pp. 3258-3261
Author(s):  
Sheng Dong ◽  
Zhe Xu Wang ◽  
Xi Rui Gao ◽  
Jing Yao

Wireless laser pointer is widely used in multimedia teaching. Due to the usage of professional high speed USB interface chips and USB2.0 protocol, the price of a wireless laser pointer in the market with the only function of changing PPT pages is about 50 dollar.This paper completes a very low price design of wireless laser pointer for multimedia teaching use based on STC89C52RC MCU and nRF905 single-chip radio transceivers,which can complete not only PPT page turning forward or backward but also black screen, drawing lines with fluorescent pen or needlepoint.


MRS Bulletin ◽  
1997 ◽  
Vol 22 (10) ◽  
pp. 19-27 ◽  
Author(s):  
Wei William Lee ◽  
Paul S. Ho

Continuing improvement of microprocessor performance historically involves a decrease in the device size. This allows greater device speed, an increase in device packing density, and an increase in the number of functions that can reside on a single chip. However higher packing density requires a much larger increase in the number of interconnects. This has led to an increase in the number of wiring levels and a reduction in the wiring pitch (sum of the metal line width and the spacing between the metal lines) to increase the wiring density. The problem with this approach is that—as device dimensions shrink to less than 0.25 μm (transistor gate length)—propagation delay, crosstalk noise, and power dissipation due to resistance-capacitance (RC) coupling become significant due to increased wiring capacitance, especially interline capacitance between the metal lines on the same metal level. The smaller line dimensions increase the resistivity (R) of the metal lines, and the narrower interline spacing increases the capacitance (C) between the lines. Thus although the speed of the device will increase as the feature size decreases, the interconnect delay becomes the major fraction of the total delay and limits improvement in device performance.To address these problems, new materials for use as metal lines and interlayer dielectrics (ILD) as well as alternative architectures have been proposed to replace the current Al(Cu) and SiO2 interconnect technology.


Impact ◽  
2019 ◽  
Vol 2019 (10) ◽  
pp. 44-46
Author(s):  
Masato Edahiro ◽  
Masaki Gondo

The pace of technology's advancements is ever-increasing and intelligent systems, such as those found in robots and vehicles, have become larger and more complex. These intelligent systems have a heterogeneous structure, comprising a mixture of modules such as artificial intelligence (AI) and powertrain control modules that facilitate large-scale numerical calculation and real-time periodic processing functions. Information technology expert Professor Masato Edahiro, from the Graduate School of Informatics at the Nagoya University in Japan, explains that concurrent advances in semiconductor research have led to the miniaturisation of semiconductors, allowing a greater number of processors to be mounted on a single chip, increasing potential processing power. 'In addition to general-purpose processors such as CPUs, a mixture of multiple types of accelerators such as GPGPU and FPGA has evolved, producing a more complex and heterogeneous computer architecture,' he says. Edahiro and his partners have been working on the eMBP, a model-based parallelizer (MBP) that offers a mapping system as an efficient way of automatically generating parallel code for multi- and many-core systems. This ensures that once the hardware description is written, eMBP can bridge the gap between software and hardware to ensure that not only is an efficient ecosystem achieved for hardware vendors, but the need for different software vendors to adapt code for their particular platforms is also eliminated.


2018 ◽  
Author(s):  
Caleb I. Fassett ◽  
◽  
Isabel R. King ◽  
Cole A. Nypaver ◽  
Bradley J. Thomson

Frequenz ◽  
2020 ◽  
Vol 74 (5-6) ◽  
pp. 191-199
Author(s):  
M. K. Verma ◽  
Binod K. Kanaujia ◽  
J. P. Saini ◽  
Padam S. Saini

AbstractA broadband circularly polarized slotted square patch antenna with horizontal meandered strip (HMS) is presented and studied. The HMS feeding technique provides the good impedance matching and broadside symmetrical radiation patterns. A set of cross asymmetrical slots are etched on the radiating patch to realize the circular polarization. An electrically small stub is added on the edge of the antenna for further improvement in performance. Measured 10-dB impedance bandwidth (IBW) and 3-dB axial ratio bandwidth (ARBW) of the proposed antenna are 32.31 % (3.14–4.35 GHz) and 20.91 % (3.34–4.12 GHz), respectively. The gain of the antenna is varied from 3.5 to 4.86dBi within 3-dB ARBW. Measured results matched well with the simulated results.


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