Numerical Analysis of the Supply Voltage of a Switching Mode RF CMOS Power Amplifier to Enhance Its Efficiency

2013 ◽  
Vol 55 (10) ◽  
pp. 2479-2484 ◽  
Author(s):  
Hoyong Hwang ◽  
Donghwan Seo ◽  
Changhyun Lee ◽  
Changkun Park
Keyword(s):  
Numerical Analysis ◽  
Power Amplifier ◽  
Supply Voltage ◽  
Rf Cmos ◽  
Switching Mode

Design methodology for a switching-mode RF CMOS power amplifier with an output transformer

2015 ◽  
Vol 8 (3) ◽  
pp. 471-477
Author(s):  
Changhyun Lee ◽  
Changkun Park
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Design Methodology ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Rf Cmos ◽  
Power Transistor ◽  
Voltage Output ◽  
Switching Mode ◽  
Output Transformer

In this study, we propose a design methodology for a switching-mode RF CMOS power amplifier with an output transformer. For a given supply voltage, output power, and target efficiency, the initial values of the transistor size, output inductance, and capacitance can be sequentially determined during the design of the power amplifier. The breakdown voltage of the power transistor is considered in the design methodology. To prove the feasibility of the proposed design methodology, we provide the design example of a 2.4-GHz switching-mode CMOS power amplifier with 180-nm RF CMOS technology. From the measured results, the feasibility of the proposed design methodology is proved.

Investigation of the power transistor size related to the efficiency of switching-mode RF CMOS power amplifier

2013 ◽  
Vol 56 (1) ◽  
pp. 110-117 ◽  
Author(s):  
Hoyong Hwang ◽  
Donghwan Seo ◽  
Jonghoon Park ◽  
Changkun Park
Keyword(s):  
Power Amplifier ◽  
Rf Cmos ◽  
Power Transistor ◽  
Switching Mode

scholarly journals A 2.5-GHz 1-V High Efficiency CMOS Power Amplifier IC with a Dual-Switching Transistor and Third Harmonic Tuning Technique

Electronics ◽  
2019 ◽  
Vol 8 (1) ◽  
pp. 69 ◽  
Author(s):  
Taufiq Alif Kurniawan ◽  
Toshihiko Yoshimasu
Keyword(s):  
Power Amplifier ◽  
High Efficiency ◽  
Low Voltage ◽  
Supply Voltage ◽  
Drain Current ◽  
Cmos Technology ◽  
Back Gate ◽  
Third Harmonic ◽  
Power Added Efficiency ◽  
Switching Transistor

This paper presents a 2.5-GHz low-voltage, high-efficiency CMOS power amplifier (PA) IC in 0.18-µm CMOS technology. The combination of a dual-switching transistor (DST) and a third harmonic tuning technique is proposed. The DST effectively improves the gain at the saturation power region when the additional gain extension of the secondary switching transistor compensates for the gain compression of the primary one. To achieve high-efficiency performance, the third harmonic tuning circuit is connected in parallel to the output load. Therefore, the flattened drain current and voltage waveforms are generated, which in turn reduce the overlapping and the dc power consumption significantly. In addition, a 0.5-V back-gate voltage is applied to the primary switching transistor to realize the low-voltage operation. At 1 V of supply voltage, the proposed PA has achieved a power added efficiency (PAE) of 34.5% and a saturated output power of 10.1 dBm.

A 60GHz power amplifier using 90-nm RF-CMOS technology

2011 ◽  
Author(s):  
Nan Zhang ◽  
Lingling Sun ◽  
Jincai Wen ◽  
Jun Liu ◽  
Jia Lou ◽  
...  
Keyword(s):  
Power Amplifier ◽  
Cmos Technology ◽  
Rf Cmos
Sign in / Sign up

Export Citation Format

Share Document