Trace-Based Data Cache Leakage Reduction at Link Time

2006 ◽  
pp. 175-188
Author(s):  
Lian Li ◽  
Jingling Xue
Keyword(s):  
Data Cache ◽  
Leakage Reduction

Subthreshold Leakage reduction Strategies for the Design of Low Power Sram

2013 ◽  
Vol 1 (4) ◽  
pp. 6-13
Author(s):  
Vanitha . ◽  
◽  
M. Parimaladevi ◽  
D. Sharmila ◽  
◽  
...  
Keyword(s):  
Low Power ◽  
Leakage Reduction ◽  
Reduction Strategies ◽  
Subthreshold Leakage

Water demand management - philosophy or implementation?

2004 ◽  
Vol 4 (3) ◽  
pp. 25-32
Author(s):  
J.S. Buckle
Keyword(s):  
Water Demand ◽  
Community Education ◽  
Water Cycle ◽  
Demand Management ◽  
Water Industry ◽  
Water Demand Management ◽  
Management Philosophy ◽  
Leakage Reduction ◽  
Drought Conditions ◽  
African Context

This paper describes the introduction of water demand management in the southern African context. Originally a response to drought conditions, water demand management is now a key element in Rand Water's strategy of water cycle management - a mix of interventions that (holistically and continuously) keep the water industry viable and sustainable. This experience points to awareness and community education programmes being an essential companion to the technical interventions such as leakage reduction measures.

scholarly journals Decreasing the Miss Rate and Eliminating the Performance Penalty of a Data Filter Cache

2021 ◽  
Vol 18 (3) ◽  
pp. 1-22
Author(s):  
Michael Stokes ◽  
David Whalley ◽  
Soner Onder
Keyword(s):  
Energy Efficient ◽  
Data Access ◽  
Performance Degradation ◽  
Access Time ◽  
Data Cache ◽  
Energy Usage ◽  
Single Cycle ◽  
Performance Penalty

While data filter caches (DFCs) have been shown to be effective at reducing data access energy, they have not been adopted in processors due to the associated performance penalty caused by high DFC miss rates. In this article, we present a design that both decreases the DFC miss rate and completely eliminates the DFC performance penalty even for a level-one data cache (L1 DC) with a single cycle access time. First, we show that a DFC that lazily fills each word in a DFC line from an L1 DC only when the word is referenced is more energy-efficient than eagerly filling the entire DFC line. For a 512B DFC, we are able to eliminate loads of words into the DFC that are never referenced before being evicted, which occurred for about 75% of the words in 32B lines. Second, we demonstrate that a lazily word filled DFC line can effectively share and pack data words from multiple L1 DC lines to lower the DFC miss rate. For a 512B DFC, we completely avoid accessing the L1 DC for loads about 23% of the time and avoid a fully associative L1 DC access for loads 50% of the time, where the DFC only requires about 2.5% of the size of the L1 DC. Finally, we present a method that completely eliminates the DFC performance penalty by speculatively performing DFC tag checks early and only accessing DFC data when a hit is guaranteed. For a 512B DFC, we improve data access energy usage for the DTLB and L1 DC by 33% with no performance degradation.

Improving data cache performance with integrated use of split caches, victim cache and stream buffers

2004 ◽  
Author(s):  
Afrin Naz ◽  
Mehran Rezaei ◽  
Krishna Kavi ◽  
Philip Sweany
Keyword(s):  
Data Cache ◽  
Cache Performance
Sign in / Sign up

Export Citation Format

Share Document