Towards Formal Verification of Neural Networks: A Temporal Logic Based Framework

2020 ◽  
pp. 73-87
Author(s):  
Xiaobing Wang ◽  
Kun Yang ◽  
Yanmei Wang ◽  
Liang Zhao ◽  
Xinfeng Shu
Keyword(s):  
Neural Networks ◽  
Formal Verification ◽  
Temporal Logic

Ein Ansatz zur formalen Verifikation von Schaltungsbeschreibungen in SystemC (An Approach for Formal Verification of Circuits in SystemC)

2003 ◽  
Vol 45 (4) ◽  
Author(s):  
Daniel Große ◽  
Rolf Drechsler
Keyword(s):  
Formal Verification ◽  
Temporal Logic ◽  
Linear Time ◽  
Linear Time Temporal Logic

ZusammenfassungDer vorgestellte Ansatz ermöglicht es, für SystemC-Schaltkreisbeschreibungen, die über einer gegebenen Gatterbibliothek definiert sind, Eigenschaften zu beweisen (engl. property checking). Als Spezifikationssprache wird LTL (linear time temporal logic) verwendet. Für den Beweis einer LTL-Eigenschaft kann die Erfüllbarkeit einer Booleschen Funktion betrachtet werden, die aus der Eigenschaft und der Schaltkreisbeschreibung mittels symbolischer Methoden konstruiert wird. Im Gegensatz zu simulationsbasierten Ansätzen kann dabei Vollständigkeit gewährleistet werden. Anhand einer Fallstudie eines skalierbaren Arbiters wird die Effizienz des Beweisverfahrens untersucht.

Model Checking for SpaceWire Error Detection Module

2012 ◽  
Vol 241-244 ◽  
pp. 3020-3025
Author(s):  
Ling Ling Dong ◽  
Yong Guan ◽  
Xiao Juan Li ◽  
Zhi Ping Shi ◽  
Jie Zhang ◽  
...  
Keyword(s):  
Model Checking ◽  
Formal Verification ◽  
Temporal Logic ◽  
Error Detection ◽  
System Model ◽  
Linear Search ◽  
Kripke Structure ◽  
Mathematical Methods ◽  
Safety Critical ◽  
Correctness Of Programs

Considerable attention has been devoted to prove the correctness of programs. Formal verification overcomes the incompleteness by applying mathematical methods to verify a design. SpaceWire is a well known communication standard. For safety-critical applications an approach is needed to validate the completeness of SpareWire design. This paper addresses formal verification of SpareWire error detection module. The system model was constructed by Kripke structure, and the properties were presented by linear temporal logic (LTL). Compared the verification of LTL with CTL (branch temporal logic), LTL properties could improve the verification efficiency due to its linear search. The error priority was checked using simulation guided by model checking. After some properties were modified, all possible behaviors of the module satisfied the specification. This method realizes complete validation of the error detection module.

scholarly journals Simplifying Neural Networks Using Formal Verification

2020 ◽  
pp. 85-93 ◽  
Author(s):  
Sumathi Gokulanathan ◽  
Alexander Feldsher ◽  
Adi Malca ◽  
Clark Barrett ◽  
Guy Katz
Keyword(s):  
Neural Networks ◽  
Formal Verification

scholarly journals Formal verification of neural agents in non-deterministic environments

2021 ◽  
Vol 36 (1) ◽  
Author(s):  
Michael E. Akintunde ◽  
Elena Botoeva ◽  
Panagiotis Kouvaros ◽  
Alessio Lomuscio
Keyword(s):  
Neural Networks ◽  
Parallel Algorithms ◽  
Formal Verification ◽  
Experimental Results ◽  
Use Case ◽  
Feed Forward ◽  
Verification Problem ◽  
Bounded Fragment

AbstractWe introduce a model for agent-environment systems where the agents are implemented via feed-forward ReLU neural networks and the environment is non-deterministic. We study the verification problem of such systems against CTL properties. We show that verifying these systems against reachability properties is undecidable. We introduce a bounded fragment of CTL, show its usefulness in identifying shallow bugs in the system, and prove that the verification problem against specifications in bounded CTL is in coNExpTime and PSpace-hard. We introduce sequential and parallel algorithms for MILP-based verification of agent-environment systems, present an implementation, and report the experimental results obtained against a variant of the VerticalCAS use-case and the frozen lake scenario.

scholarly journals “Most of” leads to undecidability: Failure of adding frequencies to LTL

2021 ◽  
pp. 82-101
Author(s):  
Bartosz Bednarczyk ◽  
Jakub Michaliszyn
Keyword(s):  
Model Checking ◽  
Formal Verification ◽  
Temporal Logic ◽  
Order Logic ◽  
First Order Logic ◽  
Statistical Reasoning ◽  
First Order ◽  
High Interest ◽  
The Past ◽  
Influence Networks

AbstractLinear Temporal Logic (LTL) interpreted on finite traces is a robust specification framework popular in formal verification. However, despite the high interest in the logic in recent years, the topic of their quantitative extensions is not yet fully explored. The main goal of this work is to study the effect of adding weak forms of percentage constraints (e.g. that most of the positions in the past satisfy a given condition, or that $$\sigma $$ σ is the most-frequent letter occurring in the past) to fragments of LTL. Such extensions could potentially be used for the verification of influence networks or statistical reasoning. Unfortunately, as we prove in the paper, it turns out that percentage extensions of even tiny fragments of LTL have undecidable satisfiability and model-checking problems. Our undecidability proofs not only sharpen most of the undecidability results on logics with arithmetics interpreted on words known from the literature, but also are fairly simple. We also show that the undecidability can be avoided by restricting the allowed usage of the negation, and discuss how the undecidability results transfer to first-order logic on words.

Modeling security properties of authentication of cryptographic protocols using spin formal verification

2020 ◽  
pp. 21-25
Author(s):  
E.A. Perevyshina ◽  
L.K. Babenko
Keyword(s):  
Model Checking ◽  
Formal Verification ◽  
Temporal Logic ◽  
Cryptographic Protocols ◽  
Wide Range ◽  
Security Properties ◽  
Verification Tools ◽  
The Stability ◽  
Security Property ◽  
Ltl Model Checking

To assess the quality and security of cryptographic protocols, we use various formal verification tools, such as Scyther tool, Avispa, ProVerif. these formal verifiers can check the protocol for vulnerability to attacks on secrecy and authentication, as these are the most prevalent attacks on protocols. However, this is not enough to fully analyze the security of the protocol. In this article, we will use linear temporal logic (LTL) model checking with SPIN. This tool, unlike the formal verifiers listed above, is not designed for a specific application in the context of cryptographic protocols; however, it has a very wide range of possibilities. In particular, for each security property, it is possible to describe the behavior of an attacker and test for the stability of the protocol model to its various attacks. The purpose of this work is to describe the developed methodology for verifying the security of authentication properties using the SPIN verifier.

scholarly journals A system for deduction-based formal verification of workflow-oriented software models

2014 ◽  
Vol 24 (4) ◽  
pp. 941-956 ◽  
Author(s):  
Radosław Klimek
Keyword(s):  
Formal Verification ◽  
Temporal Logic ◽  
Business Processes ◽  
Deductive Reasoning ◽  
Main Idea ◽  
Automatic Generation ◽  
Generation Process ◽  
Software Models ◽  
Logical Specifications ◽  
Inexperienced User

Abstract The work concerns formal verification of workflow-oriented software models using the deductive approach. The formal correctness of a model’s behaviour is considered. Manually building logical specifications, which are regarded as a set of temporal logic formulas, seems to be a significant obstacle for an inexperienced user when applying the deductive approach. A system, along with its architecture, for deduction-based verification of workflow-oriented models is proposed. The process inference is based on the semantic tableaux method, which has some advantages when compared with traditional deduction strategies. The algorithm for automatic generation of logical specifications is proposed. The generation procedure is based on predefined workflow patterns for BPMN, which is a standard and dominant notation for the modeling of business processes. The main idea behind the approach is to consider patterns, defined in terms of temporal logic, as a kind of (logical) primitives which enable the transformation of models to temporal logic formulas constituting a logical specification. Automation of the generation process is crucial for bridging the gap between the intuitiveness of deductive reasoning and the difficulty of its practical application when logical specifications are built manually. This approach has gone some way towards supporting, hopefully enhancing, our understanding of deduction-based formal verification of workflow-oriented models.

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