Combinatorial Optimization Approach for Feasible Low-Power and Real-Time Flexible OS Tasks

Author(s):  
Hamza Chniter ◽  
Mohamed Khalgui ◽  
Fethi Jarray
2021 ◽  
Vol 3 (5) ◽  
Author(s):  
João Gaspar Ramôa ◽  
Vasco Lopes ◽  
Luís A. Alexandre ◽  
S. Mogo

AbstractIn this paper, we propose three methods for door state classification with the goal to improve robot navigation in indoor spaces. These methods were also developed to be used in other areas and applications since they are not limited to door detection as other related works are. Our methods work offline, in low-powered computers as the Jetson Nano, in real-time with the ability to differentiate between open, closed and semi-open doors. We use the 3D object classification, PointNet, real-time semantic segmentation algorithms such as, FastFCN, FC-HarDNet, SegNet and BiSeNet, the object detection algorithm, DetectNet and 2D object classification networks, AlexNet and GoogleNet. We built a 3D and RGB door dataset with images from several indoor environments using a 3D Realsense camera D435. This dataset is freely available online. All methods are analysed taking into account their accuracy and the speed of the algorithm in a low powered computer. We conclude that it is possible to have a door classification algorithm running in real-time on a low-power device.


2021 ◽  
Vol 20 (3) ◽  
pp. 1-22
Author(s):  
David Langerman ◽  
Alan George

High-resolution, low-latency apps in computer vision are ubiquitous in today’s world of mixed-reality devices. These innovations provide a platform that can leverage the improving technology of depth sensors and embedded accelerators to enable higher-resolution, lower-latency processing for 3D scenes using depth-upsampling algorithms. This research demonstrates that filter-based upsampling algorithms are feasible for mixed-reality apps using low-power hardware accelerators. The authors parallelized and evaluated a depth-upsampling algorithm on two different devices: a reconfigurable-logic FPGA embedded within a low-power SoC; and a fixed-logic embedded graphics processing unit. We demonstrate that both accelerators can meet the real-time requirements of 11 ms latency for mixed-reality apps. 1


Author(s):  
Laura Falaschetti ◽  
Lorenzo Manoni ◽  
Romel Calero Fuentes Rivera ◽  
Danilo Pau ◽  
Gianfranco Romanazzi ◽  
...  

2021 ◽  
Author(s):  
Jincheng Lu ◽  
Zixuan Ou ◽  
Ziyu Liu ◽  
Cheng Han ◽  
Wenbin Ye

2021 ◽  
Author(s):  
Yung-Ting Hsieh ◽  
Khizar Anjum ◽  
Songjun Huang ◽  
Indraneel Kulkarni ◽  
Dario Pompili

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