A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-Chip Buses

2004 ◽  
pp. 585-592 ◽  
Author(s):  
Zahid Khan ◽  
Tughrul Arslan ◽  
Ahmet T. Erdogan
Keyword(s):  
Low Power ◽  
System On Chip ◽  
Encoding Scheme ◽  
On Chip

Dual low-power and crosstalk immune encoding scheme for on-chip data buses

2003 ◽  
Vol 39 (20) ◽  
pp. 1436 ◽  
Author(s):  
Z. Khan ◽  
A.T. Erdogan ◽  
T. Arslan
Keyword(s):  
Low Power ◽  
Encoding Scheme ◽  
Chip Data ◽  
Data Buses ◽  
On Chip

Low-power hybrid STT/CMOS system-on-chip embedding non-volatile magnetic memory blocks

2015 ◽  
Author(s):  
Christophe Layer ◽  
Kotb Jabeur ◽  
Stephane Gros ◽  
Laurent Becker ◽  
Pierre Paoli ◽  
...  
Keyword(s):  
Low Power ◽  
System On Chip ◽  
Magnetic Memory ◽  
On Chip

A Low-Power High-Efficiency Inductive Link Power Supply for Neural Recording and Stimulation System-on-Chip

2018 ◽  
Vol 14 (1) ◽  
pp. 129-139 ◽  
Author(s):  
Ali H. Hassan ◽  
Hassan Mostafa ◽  
Yehea Ismail ◽  
Ahmed M. Soliman
Keyword(s):  
Low Power ◽  
Power Supply ◽  
High Efficiency ◽  
Neural Recording ◽  
System On Chip ◽  
Inductive Link ◽  
Stimulation System ◽  
On Chip

Low-power system-on-chip architecture for wireless LANs

2004 ◽  
Vol 151 (1) ◽  
pp. 2 ◽  
Author(s):  
L. Bisdounis ◽  
C. Dre ◽  
S. Blionas ◽  
D. Metafas ◽  
A. Tatsaki ◽  
...  
Keyword(s):  
Power System ◽  
Low Power ◽  
Wireless Lans ◽  
System On Chip ◽  
Low Power System ◽  
On Chip

Adaptive circuit block model for power supply noise analysis of low power system-on-chip

2009 ◽  
Author(s):  
Matthias Eireiner ◽  
Doris Schmitt-Landsiedel ◽  
Paul Wallner ◽  
Andreas Schone ◽  
Stephan Henzler ◽  
...  
Keyword(s):  
Power System ◽  
Low Power ◽  
Power Supply ◽  
Noise Analysis ◽  
System On Chip ◽  
Block Model ◽  
Supply Noise ◽  
Low Power System ◽  
Adaptive Circuit ◽  
On Chip
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