Timing, Logic and Mixed-Mode Simulation for Large MOS Integrated Circuits

Author(s):  
A. R. Newton
Author(s):  
Cha-Ming Shen ◽  
Yen-Long Chang ◽  
Lian-Fon Wen ◽  
Tan-Chen Chuang ◽  
Shi-Chen Lin ◽  
...  

Abstract Highly-integrated radio frequency and mixed-mode devices that are manufactured in deep-submicron or more advanced CMOS processes are becoming more complex to analyze. The increased complexity presents us with many eccentric failure mechanisms that are uniquely different from traditional failure mechanisms found during failure analysis on digital logic applications. This paper presents a novel methodology to overcome the difficulties and discusses two case studies which demonstrate the application of the methodology. Through the case studies, the methodology was proven to be a successful approach. It is also proved how this methodology would work for such non-recognizable failures.


2005 ◽  
Vol 14 (02) ◽  
pp. 195-203 ◽  
Author(s):  
ALI ÜMIT KESKIN

Negative impedance converter circuits (NICs) are important building blocks in design and manufacturing of analog and mixed mode integrated circuits. In this paper, a catalogue of single-current feedback amplifier-based negative impedance converter circuits having impedance scaling properties is proposed. Various examples are presented to illustrate the versatility of the proposed NIC circuits.


Author(s):  
Esteban Tlelo-Cuautle ◽  
Elyoenai Martnez-Romero ◽  
Carlos Snchez-Lpez ◽  
Francisco V. ◽  
Sheldon X.-D. ◽  
...  

2005 ◽  
Vol 24 (1) ◽  
pp. 6-11
Author(s):  
P.R. Bhadri ◽  
R. Srinivasan ◽  
P. Mal ◽  
F.R. Beyette ◽  
H.W. Carter

2002 ◽  
Vol 124 (4) ◽  
pp. 318-322 ◽  
Author(s):  
J. Auersperg ◽  
E. Kieselstein ◽  
A. Schubert ◽  
B. Michel

The growing application of advanced electronic packages under harsh environmental conditions, extreme temperatures especially in automotive applications is often a reason for damage, fatigue, and failure of entire components and systems. Consequently, their thermo-mechanical reliability is one of the most important preconditions for adopting these technologies in industrial applications. To prevent chips from being exposed to the external environment integrated circuits are usually encapsulated into packages. As a result, a microelectronic package is basically a compound of several materials with quite different Young’s moduli and thermal expansion coefficients. Additionally, various kinds of inhomogeneity, residual stresses from several steps of the manufacturing process contribute to interface delaminations, chip cracking, and fatigue of solder interconnects. This paper intends to investigate mixed mode interface delamination phenomena in micro components by using combined numerical investigations by means of nonlinear FEA and experimental investigations. It explains how experimental data were used as input for the quantitative evaluation of fatigue and fracture of microcomponents. Both numerical and experimental investigations provide the basis for understanding and evaluating failure mechanisms especially in solder joints, as well as several polymer material interfaces, and should support further applications for raising the thermo-mechanical reliability of advanced electronic packages.


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