Emerging Memory Technologies

Author(s):  
Brajesh Kumar Kaushik ◽  
Shivam Verma ◽  
Anant Aravind Kulkarni ◽  
Sanjay Prajapati
Keyword(s):  
2020 ◽  
Author(s):  
SMITA GAJANAN NAIK ◽  
Mohammad Hussain Kasim Rabinal

Electrical memory switching effect has received a great interest to develop emerging memory technology such as memristors. The high density, fast response, multi-bit storage and low power consumption are their...


2018 ◽  
Vol 8 (4) ◽  
pp. 34 ◽  
Author(s):  
Vishal Saxena ◽  
Xinyu Wu ◽  
Ira Srivastava ◽  
Kehan Zhu

The ongoing revolution in Deep Learning is redefining the nature of computing that is driven by the increasing amount of pattern classification and cognitive tasks. Specialized digital hardware for deep learning still holds its predominance due to the flexibility offered by the software implementation and maturity of algorithms. However, it is being increasingly desired that cognitive computing occurs at the edge, i.e., on hand-held devices that are energy constrained, which is energy prohibitive when employing digital von Neumann architectures. Recent explorations in digital neuromorphic hardware have shown promise, but offer low neurosynaptic density needed for scaling to applications such as intelligent cognitive assistants (ICA). Large-scale integration of nanoscale emerging memory devices with Complementary Metal Oxide Semiconductor (CMOS) mixed-signal integrated circuits can herald a new generation of Neuromorphic computers that will transcend the von Neumann bottleneck for cognitive computing tasks. Such hybrid Neuromorphic System-on-a-chip (NeuSoC) architectures promise machine learning capability at chip-scale form factor, and several orders of magnitude improvement in energy efficiency. Practical demonstration of such architectures has been limited as performance of emerging memory devices falls short of the expected behavior from the idealized memristor-based analog synapses, or weights, and novel machine learning algorithms are needed to take advantage of the device behavior. In this article, we review the challenges involved and present a pathway to realize large-scale mixed-signal NeuSoCs, from device arrays and circuits to spike-based deep learning algorithms with ‘brain-like’ energy-efficiency.


Author(s):  
Armen Babayan

Magnetic random-access memory (MRAM) is one of the emerging memory technologies, which can be considered as the next universal memory because of its good parameters. Nevertheless, this type of memory is not guaranteed from defects and it is very important to understand the fault typology and develop a test solution that addresses these faults. In this paper a Built-in Self-Test (BIST) solution is presented, which is specifically tailored for MRAMs and efficiently deals with MRAM specific faults.


Micromachines ◽  
2020 ◽  
Vol 11 (1) ◽  
pp. 73
Author(s):  
Pedram Khalili Amiri

Computing systems are undergoing a transformation from logic-centric toward memory-centric architectures, where overall performance and energy efficiency at the system level are determined by the density, bandwidth, latency, and energy efficiency of the memory, rather than the logic sub-system [...]


2020 ◽  
Vol 59 (SG) ◽  
pp. SGGL03
Author(s):  
Takeru Maeda ◽  
Yuya Omura ◽  
Rihito Kuroda ◽  
Akinobu Teramoto ◽  
Tomoyuki Suwa ◽  
...  

2017 ◽  
Vol 34 (3) ◽  
pp. 4-5 ◽  
Author(s):  
Jorg Henkel
Keyword(s):  

Author(s):  
Christophe Muller ◽  
Damien Deleruyelle ◽  
Olivier Ginez
Keyword(s):  

Sign in / Sign up

Export Citation Format

Share Document