Software Hint-Driven Data Management for Hybrid Memory in Mobile Systems

Hybrid memory systems, comprised of emerging non-volatile memory (NVM) and DRAM, have been proposed to address the growing memory demand of current mobile applications. Recently emerging NVM technologies, such as phase-change memories (PCM), memristor, and 3D XPoint, have higher capacity density, minimal static power consumption and lower cost per GB. However, NVM has longer access latency and limited write endurance as opposed to DRAM. The different characteristics of distinct memory classes render a new challenge for memory system design. Ideally, pages should be placed or migrated between the two types of memories according to the data objects’ access properties. Prior system software approaches exploit the program information from OS but at the cost of high software latency incurred by related kernel processes. Hardware approaches can avoid these latencies, however, hardware’s vision is constrained to a short time window of recent memory requests, due to the limited on-chip resources. In this work, we propose OpenMem: a hardware-software cooperative approach that combines the execution time advantages of pure hardware approaches with the data object properties in a global scope. First, we built a hardware-based memory manager unit (HMMU) that can learn the short-term access patterns by online profiling, and execute data migration efficiently. Then, we built a heap memory manager for the heterogeneous memory systems that allows the programmer to directly customize each data object’s allocation to a favorable memory device within the presumed object life cycle. With the programmer’s hints guiding the data placement at allocation time, data objects with similar properties will be congregated to reduce unnecessary page migrations. We implemented the whole system on the FPGA board with embedded ARM processors. In testing under a set of benchmark applications from SPEC 2017 and PARSEC, experimental results show that OpenMem reduces 44.6% energy consumption with only a 16% performance degradation compared to the all-DRAM memory system. The amount of writes to the NVM is reduced by 14% versus the HMMU-only, extending the NVM device lifetime.

Path-dependent Vortex Switching in Ferroelectric Nanoplate Junctions Toward a Memory Device Concept

Ferroelectric vortex has attracted much attention as a promising candidate for memories with high density and high stability. It is a crucial problem to precisely manipulate the vortex chirality in order to utilize it to store information. Nevertheless, so far, a practical and direct strategy for vortex switching is still lacking. Moreover, the strong coupling of chirality between neighboring vortices in continuous systems like superlattices limits the application of ferroelectric-vortex-based memories. Here, we design a ferroelectric nanoplate junction to break the strong coupling between neighboring vortices. Phase-field simulation results demonstrate that the vortex chirality of the nanoplates could be efficiently tuned by sweeping local electric and thermal fields in the nanoplate junction. More importantly, the weak coupling between two neighboring nanoplates through the intermediate junction brings a deterministic vortex switching behavior. Based on this, we propose a concept of vortex memory devices. Our study provides an effective way to control the vortex chirality and suggests an opportunity for designing new memory devices based on ferroelectric vortex.

Artificially created interfacial states enabled van der Waals heterostructure memory device

Two-dimensional (2D) interface plays a predominate role in determining the performance of a device that is configured as a van der Waals heterostructure (vdWH). Intensive efforts have been devoted to suppressing the emergence of interfacial states during vdWH stacking process, which facilitates the charge interaction and transfer between the heterostructure layers. However, the effective generation and modulation of the vdWH interfacial states could give rise to a new design and architecture of 2D functional devices. Here, we report a 2D non-volatile vdWH memory device enabled by the artificially created interfacial states between hexagonal boron nitride (hBN) and molybdenum ditelluride (MoTe2). The memory originates from the microscopically coupled optical and electrical responses of the vdWH, with the high reliability reflected by its long data retention time over 10^4 s and large write-erase cyclic number exceeding 100. Moreover, the storage currents in the memory can be precisely controlled by the writing and erasing gates, demonstrating the tunability of its storage states. The vdWH memory also exhibits excellent robustness with wide temperature endurance window from 100 K to 380 K, illustrating its potential application in harsh environment. Our findings promise interfacial-states engineering as a powerful approach to realize high performance vdWH memory device, which opens up new opportunities for its application in 2D electronics and optoelectronics.

Performance Improvement in E-Gun Deposited SiOx- Based RRAM Device by Switching Material Thickness Reduction

A performance improvement by reduction in switching material thickness in a e-gun deposited SiOx based resistive switching memory device was investigated. Reduction in thickness cause thinner filamentary path formation during ON-state by controlling the vacancy defects. Thinner filament cause lowering of operation current from 500 μA to 100 μA and also improves the reset current (from >400 μA to <100 μA). Switching material thickness reduction also cause the forming free ability in the device. All these electrical parametric improvements enhance the device reliability performances. The device show >200 dc endurance, >3-hour data retention and >1000 P/E endurance with 100 ns pulses.

From gas separation to ion transport in cavity of the hyperbranched polyamides based on triptycene aimed for electrochromic and memory device

With the aim to obtain robust electrochemical cycling stability which is crucial for application of smart electrochromic devices (ECD), we propose an effect strategy by introducing three-dimensional (3D) star-shaped triptycene...

A Novel Attention-Based Network for Fast Salient Object Detection

In the current salient object detection network, the most popular method is using U-shape structure. However, the massive number of parameters leads to more consumption of computing and storage resources which are not feasible to deploy on the limited memory device. Some others shallow layer network will not maintain the same accuracy compared with U-shape structure and the deep network structure with more parameters will not converge to a global minimum loss with great speed. To overcome all of these disadvantages, we propose a new deep convolution network architecture with three contributions: (1) using smaller convolution neural networks (CNNs) to compress the model in our improved salient object features compression and reinforcement extraction module (ISFCREM) to reduce parameters of the model. (2) introducing channel attention mechanism to weigh different channels for improving the ability of feature representation. (3) applying a new optimizer to accumulate the long-term gradient information during training to adaptively tune the learning rate. The results demonstrate that the proposed method can compress the model to 1/3 of the original size nearly without losing the accuracy and converging faster and more smoothly on six widely used datasets of salient object detection compared with the others models. Our code is published in https://gitee.com/binzhangbinzhangbin/code-a-novel-attention-based-network-for-fast-salientobject-detection.git

Place cells may simply be memory cells: Memory compression leads to spatial tuning and history dependence

The observation of place cells has suggested that the hippocampus plays a special role in encoding spatial information. However, place cell responses are modulated by several nonspatial variables and reported to be rather unstable. Here, we propose a memory model of the hippocampus that provides an interpretation of place cells consistent with these observations. We hypothesize that the hippocampus is a memory device that takes advantage of the correlations between sensory experiences to generate compressed representations of the episodes that are stored in memory. A simple neural network model that can efficiently compress information naturally produces place cells that are similar to those observed in experiments. It predicts that the activity of these cells is variable and that the fluctuations of the place fields encode information about the recent history of sensory experiences. Place cells may simply be a consequence of a memory compression process implemented in the hippocampus.