A New High Output Resistance Accurate CMOS Current Mirror

Author(s):  
Bhawna Aggarwal ◽  
Maneesha Gupta ◽  
Himani Malik ◽  
Mahak Garg ◽  
Gaurav Taneja
1992 ◽  
Vol 28 (4) ◽  
pp. 361 ◽  
Author(s):  
P.J. Crawley ◽  
G.W. Roberts

2019 ◽  
Vol 28 (08) ◽  
pp. 1950140
Author(s):  
Caffey ◽  
Rishikesh Pandey

This paper presents a novel current mirror structure based on level shifted class-AB flipped voltage follower cell, which operates at the supply voltage of 1.2[Formula: see text]V. The level shifted class-AB flipped voltage follower cell and regulated cascode structure are used at the input and the output stages to achieve low input resistance and very high output resistance, respectively. A comparison of performance parameters of the proposed current mirror with existing structures shows that the proposed current mirror has a very less current tracking error of 0.99%, high output resistance of 18.7[Formula: see text]M[Formula: see text], wide bandwidth of 239.245[Formula: see text]MHz and low power dissipation of 104[Formula: see text][Formula: see text]W. The proposed circuit has been simulated in Cadence virtuoso analog design environment and layout of the proposed circuit has been designed in Cadence virtuoso layout XL editor using BSIM3V3 180[Formula: see text]nm CMOS technology. The post-layout simulation results have also been presented to demonstrate the effectiveness of the proposed circuit.


2014 ◽  
Vol 45 (8) ◽  
pp. 1132-1142 ◽  
Author(s):  
Nikhil Raj ◽  
Ashutosh Kumar Singh ◽  
Anil Kumar Gupta

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