High speed low level image processing on FPGAs using distributed arithmetic

1998 ◽  
pp. 436-440 ◽  
Author(s):  
Elena Cerro-Prada ◽  
Philip B. James-Roxby
Keyword(s):  
Image Processing ◽  
High Speed ◽  
Distributed Arithmetic ◽  
Low Level

HIGH-SPEED OBSERVATIONS OF HIGHLY EROSIVE VORTEX CAVITATION USING IMAGE PROCESSING

1995 ◽  
Vol 2 (2) ◽  
pp. 161-172 ◽  
Author(s):  
Kohtaro Ohba ◽  
Hitoshi Soyama ◽  
Sho Takeda ◽  
Hikaru Inooka ◽  
Risaburo Oba
Keyword(s):  
Image Processing ◽  
High Speed

High speed image processing based on Java processor for embedded systems

2010 ◽  
Vol 30 (11) ◽  
pp. 2873-2875 ◽  
Author(s):  
Ming-kai ZHU ◽  
Zhen-hua GAO ◽  
Zhi-lei CHAI
Keyword(s):  
Image Processing ◽  
Embedded Systems ◽  
High Speed ◽  
High Speed Image Processing ◽  
Java Processor

Efficient Computing in Image Processing and DSPs with ASIP Based Multiplier

2019 ◽  
Vol 13 (2) ◽  
pp. 174-180
Author(s):  
Poonam Sharma ◽  
Ashwani Kumar Dubey ◽  
Ayush Goyal
Keyword(s):  
Image Processing ◽  
High Speed ◽  
Computation Time ◽  
Digital Signal ◽  
Instruction Set ◽  
Computationally Efficient ◽  
Specific Instruction ◽  
Processor Core ◽  
Speed Performance ◽  
Application Specific

Background: With the growing demand of image processing and the use of Digital Signal Processors (DSP), the efficiency of the Multipliers and Accumulators has become a bottleneck to get through. We revised a few patents on an Application Specific Instruction Set Processor (ASIP), where the design considerations are proposed for application-specific computing in an efficient way to enhance the throughput. Objective: The study aims to develop and analyze a computationally efficient method to optimize the speed performance of MAC. Methods: The work presented here proposes the design of an Application Specific Instruction Set Processor, exploiting a Multiplier Accumulator integrated as the dedicated hardware. This MAC is optimized for high-speed performance and is the application-specific part of the processor; here it can be the DSP block of an image processor while a 16-bit Reduced Instruction Set Computer (RISC) processor core gives the flexibility to the design for any computing. The design was emulated on a Xilinx Field Programmable Gate Array (FPGA) and tested for various real-time computing. Results: The synthesis of the hardware logic on FPGA tools gave the operating frequencies of the legacy methods and the proposed method, the simulation of the logic verified the functionality. Conclusion: With the proposed method, a significant improvement of 16% increase in throughput has been observed for 256 steps iterations of multiplier and accumulators on an 8-bit sample data. Such an improvement can help in reducing the computation time in many digital signal processing applications where multiplication and addition are done iteratively.

A portable high-speed digital image processing instrument for the enhancement of television images

1986 ◽  
Vol IM-35 (4) ◽  
pp. 596-605 ◽  
Author(s):  
Lawrence Bruce Hewitt ◽  
Leonard T. Bruton ◽  
Norman R. Bartley
Keyword(s):  
Image Processing ◽  
Digital Image Processing ◽  
Digital Image ◽  
High Speed

Analysis of Fabric Shape Style Evaluation Method

2014 ◽  
Vol 1048 ◽  
pp. 173-177 ◽  
Author(s):  
Ying Mei Wang ◽  
Yan Mei Li ◽  
Wan Yue Hu
Keyword(s):  
Image Processing ◽  
High Speed ◽  
Evaluation Method ◽  
Contact Method ◽  
Ccd Cameras ◽  
Point Matching ◽  
Feature Point Matching ◽  
Motion Parameters ◽  
Measurement And Evaluation ◽  
Main Factor

Fabric shape style is one of the most important conditions in textile appearance evaluation, and also the main factor influences customer purchasing psychology. At first, the previous fabric shape style evaluation methods are classified and summarized, measurement and evaluation method discussed from tactic and dynamic aspects. Then, companied with computer vision principle, a non-contact method for measuring fabric shape style was put forward. In this method, two high-speed CCD cameras were used to capture fabric movement dynamically, fabric sequences image were obtained in this process. Used the image processing technology include pretreatment and feature point matching to get 3D motion parameters, it can provide data supports for shape style evaluation.

Multiplierless algorithms for high-speed real-time onboard image processing

2003 ◽  
Author(s):  
K. Rocha ◽  
A. Venkatachalam ◽  
T. Bose ◽  
R.L. Haupt
Keyword(s):  
Image Processing ◽  
Real Time ◽  
High Speed

Digital Video Image Processing System For The High Speed Motion Film

1985 ◽  
Author(s):  
K. Kiyohashi ◽  
T. Eguchi ◽  
R. Tate ◽  
T. Kamimoto
Keyword(s):  
Image Processing ◽  
High Speed ◽  
Digital Video ◽  
Processing System ◽  
Video Image ◽  
Image Processing System ◽  
Video Image Processing
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