High speed low level image processing on FPGAs using distributed arithmetic

Background: With the growing demand of image processing and the use of Digital Signal Processors (DSP), the efficiency of the Multipliers and Accumulators has become a bottleneck to get through. We revised a few patents on an Application Specific Instruction Set Processor (ASIP), where the design considerations are proposed for application-specific computing in an efficient way to enhance the throughput. Objective: The study aims to develop and analyze a computationally efficient method to optimize the speed performance of MAC. Methods: The work presented here proposes the design of an Application Specific Instruction Set Processor, exploiting a Multiplier Accumulator integrated as the dedicated hardware. This MAC is optimized for high-speed performance and is the application-specific part of the processor; here it can be the DSP block of an image processor while a 16-bit Reduced Instruction Set Computer (RISC) processor core gives the flexibility to the design for any computing. The design was emulated on a Xilinx Field Programmable Gate Array (FPGA) and tested for various real-time computing. Results: The synthesis of the hardware logic on FPGA tools gave the operating frequencies of the legacy methods and the proposed method, the simulation of the logic verified the functionality. Conclusion: With the proposed method, a significant improvement of 16% increase in throughput has been observed for 256 steps iterations of multiplier and accumulators on an 8-bit sample data. Such an improvement can help in reducing the computation time in many digital signal processing applications where multiplication and addition are done iteratively.

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A portable high-speed digital image processing instrument for the enhancement of television images

IEEE Transactions on Instrumentation and Measurement ◽

10.1109/tim.1986.6831777 ◽

1986 ◽

Vol IM-35 (4) ◽

pp. 596-605 ◽

Cited By ~ 2

Author(s):

Lawrence Bruce Hewitt ◽

Leonard T. Bruton ◽

Norman R. Bartley

Keyword(s):

Image Processing ◽

Digital Image Processing ◽

Digital Image ◽

High Speed

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Analysis of Fabric Shape Style Evaluation Method

Advanced Materials Research ◽

10.4028/www.scientific.net/amr.1048.173 ◽

2014 ◽

Vol 1048 ◽

pp. 173-177 ◽

Cited By ~ 1

Author(s):

Ying Mei Wang ◽

Yan Mei Li ◽

Wan Yue Hu

Keyword(s):

Image Processing ◽

High Speed ◽

Evaluation Method ◽

Contact Method ◽

Ccd Cameras ◽

Point Matching ◽

Feature Point Matching ◽

Motion Parameters ◽

Measurement And Evaluation ◽

Main Factor

Fabric shape style is one of the most important conditions in textile appearance evaluation, and also the main factor influences customer purchasing psychology. At first, the previous fabric shape style evaluation methods are classified and summarized, measurement and evaluation method discussed from tactic and dynamic aspects. Then, companied with computer vision principle, a non-contact method for measuring fabric shape style was put forward. In this method, two high-speed CCD cameras were used to capture fabric movement dynamically, fabric sequences image were obtained in this process. Used the image processing technology include pretreatment and feature point matching to get 3D motion parameters, it can provide data supports for shape style evaluation.

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