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A novel low-power, low-offset, and high-speed CMOS dynamic latched comparator
Analog Integrated Circuits and Signal Processing
◽
10.1007/s10470-011-9687-5
◽
2011
◽
Vol 70
(3)
◽
pp. 337-346
◽
Cited By ~ 33
Author(s):
HeungJun Jeon
◽
Yong-Bin Kim
Keyword(s):
Low Power
◽
High Speed
◽
Latched Comparator
◽
Low Offset
Download Full-text
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References
Low-power high-speed low-offset fully dynamic CMOS latched comparator
10.17760/d20000933
◽
2010
◽
Author(s):
HeungJun Jeon
Keyword(s):
Low Power
◽
High Speed
◽
Latched Comparator
◽
Low Offset
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A CMOS low-power low-offset and high-speed fully dynamic latched comparator
23rd IEEE International SOC Conference
◽
10.1109/socc.2010.5784646
◽
2010
◽
Cited By ~ 26
Author(s):
HeungJun Jeon
◽
Yong-Bin Kim
Keyword(s):
Low Power
◽
High Speed
◽
Latched Comparator
◽
Low Offset
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Design of a Low-Power Ultra High Speed Dynamic Latched Comparator in 90-nm CMOS Technology
2018 International Conference on Computer, Communication, Chemical, Material and Electronic Engineering (IC4ME2)
◽
10.1109/ic4me2.2018.8465625
◽
2018
◽
Cited By ~ 1
Author(s):
Fazle Rabbi
◽
Sajan Das
◽
Quazi Delwar Hossain
◽
Naqib Sad Pathan
Keyword(s):
Low Power
◽
High Speed
◽
Cmos Technology
◽
Ultra High Speed
◽
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An ultra high-resolution low propagation delay time and low power with 1.25GS/s CMOS dynamic latched comparator for high-speed SAR ADCs in 180nm technology
2017 IEEE 4th International Conference on Knowledge-Based Engineering and Innovation (KBEI)
◽
10.1109/kbei.2017.8324983
◽
2017
◽
Cited By ~ 1
Author(s):
Sina Mahdavi
◽
Mahsa Jafarzadeh
◽
Maryam Poreh
◽
Shadi Ataei
Keyword(s):
High Resolution
◽
Low Power
◽
Delay Time
◽
High Speed
◽
Propagation Delay
◽
Propagation Delay Time
◽
Latched Comparator
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Design of Low Power, High Speed, Low Offset and Area Efficient Dynamic-Latch Comparator for SAR-ADC
2020 International Conference on Innovative Trends in Communication and Computer Engineering (ITCE)
◽
10.1109/itce48509.2020.9047792
◽
2020
◽
Author(s):
Kasi Bandla
◽
Harikrishnan A.
◽
Dipankar Pal
Keyword(s):
Low Power
◽
High Speed
◽
Sar Adc
◽
Low Offset
◽
Area Efficient
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A low‐offset low‐power and high‐speed dynamic latch comparator with a preamplifier‐enhanced stage
IET Circuits Devices & Systems
◽
10.1049/cds2.12008
◽
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◽
Vol 15
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◽
pp. 65-77
Author(s):
Jérôme K. Folla
◽
Maria L. Crespo
◽
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◽
Mohammad A. S. Bhuiyan
◽
Andres Cicuttin
◽
...
Keyword(s):
Low Power
◽
High Speed
◽
Low Offset
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High speed, low offset, low power differential comparator with constant common mode voltage
2017 IEEE 12th International Conference on ASIC (ASICON)
◽
10.1109/asicon.2017.8252615
◽
2017
◽
Cited By ~ 3
Author(s):
Mehdi Nasrollahpour
◽
Sotoudeh Hamedi-Hagh
Keyword(s):
Low Power
◽
High Speed
◽
Common Mode
◽
Power Differential
◽
Common Mode Voltage
◽
Low Offset
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Design of a low power, high speed self calibrated dynamic latched comparator
2020 International Symposium on Devices, Circuits and Systems (ISDCS)
◽
10.1109/isdcs49393.2020.9262972
◽
2020
◽
Author(s):
Sumit Kumar Jaiswal
◽
Annapurna Mondal
◽
Supriyo Srimani
◽
Subhajit Das
◽
Kasturi Ghosh
◽
...
Keyword(s):
Low Power
◽
High Speed
◽
Latched Comparator
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A low power and high-speed current latched comparator for weak current operations
The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.
◽
10.1109/apccas.2004.1412738
◽
2005
◽
Author(s):
Ro-Min Weng
◽
Chia-Wei Chiang
Keyword(s):
Low Power
◽
High Speed
◽
Weak Current
◽
Latched Comparator
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A high-speed, low-offset and low-power differential comparator for analog to digital converters
2017 International SoC Design Conference (ISOCC)
◽
10.1109/isocc.2017.8368862
◽
2017
◽
Cited By ~ 3
Author(s):
Mehdi Nasrollahpour
◽
Chi-Hsien Yen
◽
Sotoudeh Hamedi-hagh
Keyword(s):
Low Power
◽
High Speed
◽
Analog To Digital Converters
◽
Analog To Digital
◽
Power Differential
◽
Low Offset
Download Full-text
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