Titanium Oxide Adhesion Layer for High Temperature Annealed Si/Si3N4/TiO x /Pt/LiCoO2 Battery Structures

2015 ◽  
Vol 45 (2) ◽  
pp. 910-916 ◽  
Author(s):  
E. M. F. Vieira ◽  
J. F. Ribeiro ◽  
R. Sousa ◽  
M. M. Silva ◽  
L. Dupont ◽  
...  
2015 ◽  
Vol 2015 (1) ◽  
pp. 000365-000369 ◽  
Author(s):  
Zhiming Liu ◽  
Sara Hunegnaw ◽  
Hailuo Fu ◽  
Jun Wang ◽  
Tafadzwa Magaya ◽  
...  

Inorganic interposers made of glass are attractive for advanced high frequency applications and ultra- fine line patterning technology. Because glass combines a couple of benefits like large form factor, good coefficient of thermal expansion (CTE) matching to silicon, smooth surface and a low dielectric constant and loss tangent. Recently much progress has been made with respect to glass electrical and physical properties. This allows for handling of thin glass sheets down to 100 μm in a typical PCB panel format. Also advances have been made in the area of laser drilling allowing aspect ratio up to 1:10 for 25 μm diameter of through glass via (TGV). Another major challenge is the cost competitive and reliable metallization of smooth glass, a critical prerequisite for the use of glass substrates in the electronic packaging market. Plated copper does not adhere directly to glass. Sputtering technology typically also requires a 50 nm thick adhesion promoting metal layer (like Ti) before copper can be seeded. This metal layer could not be etched together with the copper and needs to be removed between traces by etching in an additional step. A volatile flammable solvent based metal oxide precursor coating solution has been used to make an adhesive metal oxide layer by a modified sol-gel process. To prevent potential safety issue for mass production water based metal oxide precursor coating solution so called VitroCoat GI W has been developed. The VitroCoat GI W solution can be dip-coated on flat glass surface and TGVs followed by sintering to form an ultrathin metal oxide adhesion layer (about 10nm). The thin adhesive layer enables electroless and electrolytic copper plating directly onto glass substrates without changing any of the glass properties or impacting high frequency performance. The thin metal oxide adhesive layer is non-conductive and can be easily removed from the area between circuit traces. This paper will focus on the coating uniformity and capability of VitroCoat GI W on flat glass surface and TGVs and the adhesion of wet chemical metallization on glass interposer. This adhesion layer can be used for copper fine line patterning on glass and radio frequency (RF) device fabrication.


2017 ◽  
Vol 2017 (1) ◽  
pp. 000458-000463
Author(s):  
Michael Merschky ◽  
Fabian Michalik ◽  
Martin Thoms ◽  
Robin Taylor ◽  
Diego Reinoso-Cocina ◽  
...  

Abstract With the trends towards miniaturization and heterogeneous integration, both IC and advanced substrate manufacturers are striving to meet the needs of next generation platforms, to increase the density of interconnects, and generate conductors featuring finer lines and spaces. Advanced manufacturing technologies such as Semi-Additive-Processing (SAP) and Advanced Modified-Semi-Additive-Processing (amSAP) were devised, realized and implemented in order to meet these requirements. Line and space (L/S) requirements of copper conductors will be below 5/5μm for advanced substrates, with 2/2μm L/S required for chip to chip connections in the near future. Herein we report about the performance of the new developed ferric sulfate based EcoFlash™ process for SAP and amSAP application with the focus on glass as the substrate and VitroCoat as thin metal oxide adhesion promotion layer. The adhesion promotion layer (about 5–10 nm thickness) is dip-coated by a modified sol-gel process followed by sintering which creates chemical bonds to the glass. The sol-gel dip coating process offers good coating uniformity on both Though-Glass-Via (TGV) and glass surfaces under optimized coating conditions. Uniform coating can be achieved up to aspect ratios of 10:1 by using a 300μm thick glass with 30μm diameter TGV. The thin adhesive layer enables electroless and electrolytic copper plating directly onto glass substrates. Excellent adhesion of electroless plated copper seed layer on glass can be achieved by using the adhesive layer and annealing technology. The thin adhesive layer is non-conductive and can be easily removed from the area between circuit traces together with the electroless copper seed layer by etching with a ferric sulfate based process. We have successfully integrated the adhesion layer and electroless and electrolytic copper plating technologies into semi-additive process and seed layer etching capable producing L/S below 10 μm.


2022 ◽  
Vol 65 ◽  
pp. 210-218
Author(s):  
Caroline Piffet ◽  
Bénédicte Vertruyen ◽  
Frédéric Hatert ◽  
Rudi Cloots ◽  
Frédéric Boschini ◽  
...  

2003 ◽  
Vol 779 ◽  
Author(s):  
M. Legros ◽  
G. Dehm ◽  
T.J. Balk ◽  
E. Arzt ◽  
O. Bostrom ◽  
...  

AbstractPlastic deformation due to thermal stresses has been investigated for different metallic films deposited on Si or α-alumina substrates. We conducted post-mortem TEM and SEM investigations of samples that underwent thermal cycles in order to capture the microstructural changes imposed by thermal stresses. The ultimate goal is to determine the dominant plasticity mechanisms responsible for such changes. In-situ thermal cycles performed inside the TEM allowed direct and real-time observations of dislocation behaviour under stress. It is shown that dislocation density drops in Al/Si, Au/Si and in Cu/α-alumina thin film systems. Except in the case of pseudo-epitaxial Cu on sapphire, the interaction of dislocations with the interfaces (passivation, oxide, adhesion layer) is attractive and leads to the disappearance of interfacial dislocations. In this light, the generalized observation of high tensile stresses that arise in metallic films at the end of cooling is explained in terms of insufficient dislocation sources instead of classic strain hardening. Diffusional processes can substitute for a lack of dislocation, but the low relaxation strain rate that would be excpected should lead to high stresses during the cooling stages of thermal cycles.


Sign in / Sign up

Export Citation Format

Share Document