High-quality industrial n-type silicon wafers with an efficiency of over 23% for Si heterojunction solar cells

2016 ◽  
Vol 11 (1) ◽  
pp. 78-84 ◽  
Author(s):  
Fanying Meng ◽  
Jinning Liu ◽  
Leilei Shen ◽  
Jianhua Shi ◽  
Anjun Han ◽  
...  
Solar RRL ◽  
2021 ◽  
Author(s):  
Bruno Vicari Stefani ◽  
Moonyong Kim ◽  
Matthew Wright ◽  
Anastasia Soeriyadi ◽  
Dmitriy Andronikov ◽  
...  

2010 ◽  
Vol 96 (1) ◽  
pp. 013507 ◽  
Author(s):  
Qi Wang ◽  
M. R. Page ◽  
E. Iwaniczko ◽  
Yueqin Xu ◽  
L. Roybal ◽  
...  

MRS Advances ◽  
2016 ◽  
Vol 1 (48) ◽  
pp. 3235-3246 ◽  
Author(s):  
Twan Bearda ◽  
Ivan Gordon ◽  
Hariharsudan Sivaramakrishnan Radhakrishnan ◽  
Valérie Depauw ◽  
Kris Van Nieuwenhuysen ◽  
...  

ABSTRACTIn order to reduce the material cost for silicon solar cells, several research groups are investigating methods to minimize the silicon consumption for making monocrystalline silicon wafers. One promising approach is deposition of an epitaxial layer on porous silicon, followed by detachment of the layer. This contribution discusses improvements in the epitaxial wafer fabrication by optimization of the porosification process. The introduction of a layered porous silicon structure allows to independently improve both epitaxial layer quality and detachment yield. In this way, we have managed to obtain 100µm thick silicon wafers with effective lifetimes up to 1.3ms, and 40µm thick wafers with effective lifetimes up to 700µs. We will also review the current status of the process development for solar cells made on thin wafers. Two approaches are presented. In the first approach, heterojunction solar cells are fabricated on freestanding epitaxial wafers of 40µm thickness. In the second approach, high efficiency (21%) heterojunction back-contacted cells are fabricated on wafers that are bonded to a glass superstrate. Challenges for device processing and limitations in cell performance are discussed.


Sign in / Sign up

Export Citation Format

Share Document