Modeling and Simulation Based Investigation of Triple Material Surrounding Gate Tunnel FET for Low Power Application

Silicon ◽  
2021 ◽  
Author(s):  
M. Suguna ◽  
R. Kaveri ◽  
V. A. Nithya Sree ◽  
M. Hemalatha ◽  
N. B. Balamurugan
Keyword(s):  
Low Power ◽  
Modeling And Simulation ◽  
Tunnel Fet ◽  
Simulation Based ◽  
Surrounding Gate ◽  
Power Application

Design of tunnel FET architectures for low power application using improved Chimp optimizer algorithm

2021 ◽  
Author(s):  
Sabitabrata Bhattacharya ◽  
Suman Lata Tripathi ◽  
Vikram Kumar Kamboj
Keyword(s):  
Low Power ◽  
Tunnel Fet ◽  
Power Application

Trapezoidal Channel Double Gate Tunnel FET Suitable for better Scalability, Speed and Low Power Application

2021 ◽  
Author(s):  
Bijoy Goswami ◽  
Pritam Das ◽  
Abhishek Roy ◽  
Savio Jay Sengupta ◽  
Subir Kumar Sarkar
Keyword(s):  
Low Power ◽  
Double Gate ◽  
Trapezoidal Channel ◽  
Tunnel Fet ◽  
Power Application

Silicon on ferroelectric Tunnel FET (SOF-TFET) for low power application

2014 ◽  
Author(s):  
Sangeeta Singh ◽  
Pawan Pal ◽  
Rohit Mittal ◽  
Anurag Tamia ◽  
P. N. Kondekar
Keyword(s):  
Low Power ◽  
Tunnel Fet ◽  
Power Application

Simulation-Based Power Estimation of Low Power MD5 Design Techniques

2016 ◽  
Vol 2 (09) ◽  
pp. 625-630
Author(s):  
Shamsiah Binti Suhaili ◽  
Takahiro Watanabe
Keyword(s):  
Low Power ◽  
Power Estimation ◽  
Simulation Based ◽  
Design Techniques
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