Annealing behavior of metastable defects created by bias stress in hydrogenated amorphous silicon thin film transistors

1992 ◽  
Vol 83 (10) ◽  
pp. 833-835 ◽  
Author(s):  
Jeong Young Lee ◽  
Choonchon Lee ◽  
Jin Jang ◽  
Byung Seong Bae
1995 ◽  
Vol 67 (17) ◽  
pp. 2503-2505 ◽  
Author(s):  
Ya‐Hsiang Tai ◽  
Jun‐Wei Tsai ◽  
Huang‐Chung Cheng ◽  
Feng‐Cheng Su

1994 ◽  
Vol 336 ◽  
Author(s):  
H.S. Choi ◽  
Y.S. Kim ◽  
S.K. Lee ◽  
J.K. Yoon ◽  
W.S. Park ◽  
...  

ABSTRACTThe effects of top-insulator on the instability problems of hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs) have been studied. In a-Si:H TFT with top-insulator (E/S type), charge trapping into the both of top-insulator and gate insulator has been shown under the bias stress.In order to investigate the charge trapping effects of top-insulator, we proposed a new method of Measurement. By this Method, we observed that trapped charges in top-insulator increased drain currents for positive gate bias stress, and this increment of drain currents was more serious with increasing the ratio of source/drain overlap length to channel length. It has founded that the instability problems of a-Si:H TFTs was attributed to the effects of top-insulator as well as that of gate insulator.


1991 ◽  
Vol 69 (4) ◽  
pp. 2339-2345 ◽  
Author(s):  
J. Kanicki ◽  
F. R. Libsch ◽  
J. Griffith ◽  
R. Polastre

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