Constructal optimization of cylindrical heat sources surrounded with a fin based on minimization of hot spot temperature

2015 ◽  
Vol 68 ◽  
pp. 1-7 ◽  
Author(s):  
Shuwen Gong ◽  
Lingen Chen ◽  
Huijun Feng ◽  
Zhihui Xie ◽  
Fengrui Sun
Keyword(s):  
Hot Spot ◽  
Heat Sources ◽  
Spot Temperature

Constructal Placement of Discrete Heat Sources With Different Lengths in Vertical Ducts Under Natural and Mixed Convection

2018 ◽  
Vol 140 (12) ◽  
Author(s):  
Bugra Sarper ◽  
Mehmet Saglam ◽  
Orhan Aydin
Keyword(s):  
Heat Transfer ◽  
Mixed Convection ◽  
Hot Spot ◽  
Experimental Studies ◽  
Vertical Channel ◽  
Working Fluid ◽  
Heat Sources ◽  
Ansys Fluent ◽  
Cooling Performance ◽  
Spot Temperature

In this study, convective heat transfer in a discretely heated parallel-plate vertical channel which simulates an IC package is investigated experimentally and numerically. Both natural and mixed convection cases are considered. The primary focus of the study is on determining optimum relative lengths of the heat sources in order to reduce the hot spot temperature and to maximize heat transfer from the sources to air. Various values of the length ratio and the modified Grashof number (for the natural convection case)/the Richardson number (for the mixed convection case) are examined. Conductive and radiative heat transfer is included in the analysis while air is used as the working fluid. Surface temperatures of the heat sources and the channel walls are measured in the experimental study. The numerical studies are performed using a commercial CFD code, ANSYS fluent. The variations of surface temperature, hot spot temperature, Nusselt number, and global conductance of the system are obtained for varying values of the working parameters. From the experimental studies, it is showed that the use of identical heat sources reduces the overall cooling performance both in natural and mixed convection. However, relatively decreasing heat sources lengths provides better cooling performance.

Study on Heat Conduction in a Simulated Multicore Processor Chip—Part I: Analytical Modeling

2013 ◽  
Vol 135 (2) ◽  
Author(s):  
Wataru Nakayama
Keyword(s):  
Hot Spots ◽  
Hot Spot ◽  
Heat Sources ◽  
Multicore Processor ◽  
Oxide Interface ◽  
Transfer Coefficients ◽  
Heat Transfer Coefficients ◽  
Fine Grain ◽  
Target Spot ◽  
Spot Temperature

A system of temperature calculations is developed to study the conditions leading to hot spot occurrence on multicore processor chips. The analysis is performed on a physical model which incorporates certain salient features of multicore processor. The model has active and background cells laid out in a checkered pattern, and the pattern repeats itself in fine grain active cells. The die has a buried dioxide and a wiring layer stacked on the die body, and heat sources are placed at the wiring layer/buried oxide interface. With this model we explore the effects of various parameters on the target spot temperature. The parameters are the die dimensions, the materials' thermal conductivities, the effective heat transfer coefficients on the die surfaces, the power map, and the spatial resolution with which we view the power and temperature distributions on the die. Closed-form analytical solutions are derived and used to examine the roles of these parameters in creating hot spots. The present paper reports the details of mathematical formulations and steps of temperature calculation. The results for a particular example case are included to illustrate what can be learned from the calculations.

A Simple Model for Calculating Transformer Hot-Spot Temperature

2009 ◽  
Vol 24 (3) ◽  
pp. 1257-1265 ◽  
Author(s):  
Dejan Susa ◽  
Hasse Nordman
Keyword(s):  
Simple Model ◽  
Hot Spot ◽  
Spot Temperature

Silicon Hot Spot Remediation With a Germanium Self Cooling Layer

2011 ◽  
Author(s):  
Horacio Nochetto ◽  
Peng Wang ◽  
Avram Bar-Cohen
Keyword(s):  
Hot Spots ◽  
Hot Spot ◽  
Silicon Layer ◽  
Great Promise ◽  
Applied Current ◽  
Chip Cooling ◽  
Primary Driver ◽  
Germanium Layer ◽  
On Chip ◽  
Spot Temperature

Driven by shrinking feature sizes, microprocessor hot spots have emerged as the primary driver for on-chip cooling of today’s IC technologies. Current thermal management technologies offer few choices for such on-chip hot spot remediation. A solid state germanium self-cooling layer, fabricated on top of the silicon chip, is proposed and demonstrated to have great promise for reducing the severity of on-chip hot spots. 3D thermo-electrical coupled simulations are used to investigate the effectiveness of a bi-layer device containing a germanium self-cooling layer above an electrically insulated silicon layer. The parametric variables of applied current, cooler size, silicon percentage, and total die thickness are sequentially optimized for the lowest hot spot temperature compared to a non-self-cooled silicon chip. Results suggest that the localized self-cooling of the germanium layer coupled with the higher thermal conductivity of the silicon chip can significantly reduce the temperature rise resulting from a micro-scaled hot spot.

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