Effect of seed layer thickness on optoelectronic properties of ZnO-NRs/p-Si photodiodes

Optik ◽  
2018 ◽  
Vol 160 ◽  
pp. 234-242 ◽  
Author(s):  
M. Lajvardi ◽  
M.E. Ghazi ◽  
M. Izadifard ◽  
H. Eshghi ◽  
I. Hadi
Keyword(s):  
Layer Thickness ◽  
Seed Layer ◽  
Optoelectronic Properties ◽  
Seed Layer Thickness

Metal Seed Layer Thickness-Induced Transition From Vertical to Horizontal Growth of MoS2 and WS2

Nano Letters ◽  
2014 ◽  
Vol 14 (12) ◽  
pp. 6842-6849 ◽  
Author(s):  
Yeonwoong Jung ◽  
Jie Shen ◽  
Yanhui Liu ◽  
John M. Woods ◽  
Yong Sun ◽  
...  
Keyword(s):  
Layer Thickness ◽  
Seed Layer ◽  
Horizontal Growth ◽  
Seed Layer Thickness

The effect of seed layer thickness on alignment and morphology of ZnO nanorods

Vacuum ◽  
2011 ◽  
Vol 86 (1) ◽  
pp. 101-105 ◽  
Author(s):  
H. Ghayour ◽  
H.R. Rezaie ◽  
Sh. Mirdamadi ◽  
A.A. Nourbakhsh
Keyword(s):  
Layer Thickness ◽  
Seed Layer ◽  
Zno Nanorods ◽  
Seed Layer Thickness

Scaling of Copper Seed Layer Thickness Using Plasma-Enhanced ALD and Optimized Precursors

2013 ◽  
Vol 26 (1) ◽  
pp. 17-22 ◽  
Author(s):  
Jiajun Mao ◽  
Eric Eisenbraun ◽  
Vincent Omarjee ◽  
Andrey Korolev ◽  
Christian Dussarrat
Keyword(s):  
Layer Thickness ◽  
Seed Layer ◽  
Copper Seed Layer ◽  
Seed Layer Thickness

Growth of ZnO Nanorods on Different Seed Layer Thickness Using the Hydrothermal Method for UV Detection

2019 ◽  
Vol 14 (7) ◽  
pp. 964-971 ◽  
Author(s):  
Basavaraj S. Sannakashappanavar ◽  
C. R. Byrareddy ◽  
Nandini A. Pattanashetti ◽  
Kunal Singh ◽  
Aniruddh Bahadur Yadav
Keyword(s):  
Hydrothermal Method ◽  
Layer Thickness ◽  
Seed Layer ◽  
Zno Nanorods ◽  
Uv Detection ◽  
Seed Layer Thickness

Effects of ZnO seed layer thickness on catalyst-free growth of ZnO nanostructures for enhanced UV photoresponse

2018 ◽  
Vol 98 ◽  
pp. 344-353 ◽  
Author(s):  
Forat H. Alsultany ◽  
Z. Hassan ◽  
Naser M. Ahmed ◽  
Nezar G. Elafadill ◽  
Hassnen R. Abd
Keyword(s):  
Layer Thickness ◽  
Seed Layer ◽  
Zno Nanostructures ◽  
Catalyst Free ◽  
Free Growth ◽  
Seed Layer Thickness

Scaling the 3D Bumps Pitch from 20 to 10 μm, Focusing on the Wet Cu Seed Etch Process Development

2014 ◽  
Vol 219 ◽  
pp. 237-240 ◽  
Author(s):  
Samuel Suhard ◽  
A. Moussa ◽  
J. Slakkeboorn ◽  
F. Beirnaert ◽  
I. de Preter ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Layer Thickness ◽  
Seed Layer ◽  
Process Development ◽  
Electrical Contact ◽  
Seed Layer Thickness ◽  
Good Electrical Contact ◽  
Stacked Integrated Circuits

Within 3D stacked integrated circuits (3D-SIC), the fabrication of well-defined and solid microbumps is required. These bumps are typically being processed in presence of probing metal such as Al in order to stack functioning dies [1]. As a result of the variety of metals present and the continuous microbump downscaling towards 10 μm, more selective Cu seed etch chemistries are being screened. These Cu seed etch chemistries should be compatible with a variety of metals (Ni, Sn, Al, Co) and generate bumps without undercut and acceptable lateral etch (< 300 nm/side for 20 μm and < 150 nm/side for 10 μm). However the lateral etch specifications were just met for 20 μm [2] and will be more stringent for 10 μm, especially as the lateral etch specification are within the same range as the Cu seed layer thickness (150 nm). Additionally, the current seed etch process is yielding rough bumps (Rs >15 nm) whereas our target is set to be <12 nm in order to guarantee a good electrical contact.

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