Viscoelastic behavior of polishing pad: Effects on edge roll-off during silicon wafer polishing

2020 ◽  
Vol 62 ◽  
pp. 30-39 ◽  
Author(s):  
Urara Satake ◽  
Sena Harada ◽  
Toshiyuki Enomoto
2010 ◽  
Vol 126-128 ◽  
pp. 539-544
Author(s):  
Sung Lin Tsai ◽  
Fuang Yuan Huang ◽  
Biing Hwa Yan ◽  
Yao Ching Tsai

This paper presents a new polishing pad with polishing silicon surface composed of a layer of Ethylene-vinyl acetate (EVA) adhesive pad coated with SiC grits. A set of polishing parameters: coating SiC grit size, concentration of SiC grit in slurry, polishing load, polishing wheel turning speed, and absorption time of polishing pad were identified with the Taguchi Methods for optimum polishing effect in terms of roughness of polished silicon surface. A surface roughness of 0.026 μm Ra can be obtained with the following values: grit size at 1.2 μm (both coated on pad and mixed in slurry), concentration of SiC grit in slurry at 25%, polishing load at 50 gram, turning speed at 10,000 rpm, absorption time of polishing pad at 15 minutes.


2011 ◽  
Vol 314-316 ◽  
pp. 829-836 ◽  
Author(s):  
Wei Ping Yang ◽  
Yong Bo Wu ◽  
Hong Fei Yang

Considering the technical status and existing problems of traditional silicon wafer chemical mechanical polishing (CMP), especially for the diameter of silicon wafer increasing, constantly, the surface quality and efficiency of silicon wafer polishing are becoming an urgent problem to be solved, so the research subject of ultrasonic vibration hybrid polishing new technique was proposed. By means of mechanism theoretical analysis research, firstly, the processing mechanism of hybrid polishing was studied systematically. An investigation of polishing mechanisms based on the micro-contact model between the polishing pad and the polishing surface of silicon wafer was developed. Polishing mechanism theoretical analysis shows that when ultrasonic vibrations combined with mechanical and chemical, the performance of polishing slurry is improved in the process of CMP, therefore to create favorable conditions. To verify the established theory, then, a series of experiments to investigate the traditional CMP are conducted, as well as the polishing tool with the forms of ultrasonic vibration, the polishing pad, the polishing surface quality, velocity at polishing point v, and slurry supplying Q on silicon wafer polishing. Experiment findings showed that, in the same polishing conditions, especially, hybrid polishing by ultrasonic-elliptic-vibration has gained more advantage over the effect of silicon wafer polishing. When ultrasonic-elliptic-vibration is put in polishing tool, the silicon wafer polished surface roughness Ra from the traditional method of polishing 0.077μm going down to the 0.042μm, the no-smooth rate KR which describes the polished surface morphology is significantly improved, and the material removal rate increases by 18%. Experimental research findings of the surface quality and the material removal mechanism are shown to be consistent with the theoretical analysis.


2020 ◽  
Vol 66 ◽  
pp. 577-592
Author(s):  
Urara Satake ◽  
Senju Matsui ◽  
Toshiyuki Enomoto
Keyword(s):  

1991 ◽  
pp. 192-201
Author(s):  
Yamato Samitsu ◽  
Takahumi Yoshida ◽  
Nobuo Yasunaga ◽  
Takashi Ohmoto ◽  
Sadamu Horie

2010 ◽  
Vol 92 ◽  
pp. 183-187 ◽  
Author(s):  
X.K. Hu ◽  
Zhi Tang Song ◽  
H.B. Wang ◽  
W.L. Liu ◽  
F. Qin ◽  
...  

Chemical mechanical polishing technique is more frequently adopted for planarization in integrated circuit fabrication. The silica abrasives in colloidal state are fabricated with the sodium silicate solution as raw materials through the polymerization reaction among silicic acid molecules. By continuous injection of silicic acid into the preexisting silica solution, the diameter of silica nanoparticles increases. The different sized silica nanoparticles are imaged by scanning electron microscopy, and the dried silica are characterized by X-ray diffraction and thermal analysis. The polishing test on silicon wafer with as-fabricated silica abrasives shows that the surface flatness reaches 1.1 nm roughness, however, micro scratches are still present in the surface.


1992 ◽  
Vol 58 (7) ◽  
pp. 1185-1189 ◽  
Author(s):  
Yamato SAMITSU ◽  
Nobuo YASUNAGA ◽  
Takahumi YOSHIDA ◽  
Takasi OHMOTO ◽  
Sadamu HORIE

2011 ◽  
Vol 496 ◽  
pp. 1-6 ◽  
Author(s):  
Guang Qiu Hu ◽  
Jing Lu ◽  
Xi Peng Xu

In this paper, in order to avoid aggregate of nanodiamonds and reduce the damage problem caused by the hard abrasives during polishing, a kind of ultra-fine nanodiamond abrasive polishing pad was fabricated by means of sol-gel technology. The polishing pad was then used to polish silicon wafer on a nano-polishing machine. The surface morphologies and roughness were measured by both optical microscope and atomic force microscope (AFM). It is found that it was easy to machine the silicon wafer to mirror surface after polishing with the nanodiamond pad. And the surface roughness of the silicon wafer was reduced to 0.402 nm.


2009 ◽  
Vol 60-61 ◽  
pp. 232-235 ◽  
Author(s):  
Quan Cheng Gong ◽  
Jian Zhu ◽  
Shi Xing Jia ◽  
Jing Wu

This paper presents a kind of fine polishing technique that adopts three-step polishing procedure and keeping-wafer-wet method. In order to remove the damaged layer created by lapping process or improve surface condition of silicon wafer, polishing process is needed. In this paper, techniques of improving the surface roughness of silicon are studied, three different polishing processes are presented, and optimum condition has been attained. Experiments of Si-Si bonding are also performed, and results show that after polishing ends, keeping surface of wafer wet is necessary to avoid slurry agglomerating.


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