Over the course of the past few years, the semiconductor industry has continued to invent and innovate profoundly to adhere to Moore’s Law and Dennard scaling. At each of the technology nodes starting with 45nm, new materials and integration techniques, such as high-K & metal gates, double patterning techniques, and now 3D FinFet / Trigate device geometries are being introduced in order to maintain device performance. This places a large burden on unit process development to accommodate and deliver advanced process capability and is growing the need for the ultimate etch solution: etching with atomic layer precision. Atomic layer etching is a promising path to answer the processing demands of thin high mobility channel devices on the angstrom scale. Self-limiting reactions, discrete reaction & activation steps, or extremely low ion energy etch plasmas are some of the pathways being pursued for precise sub-nanometer material removal. In this invited paper, previously published in SPIE, the ability to achieve atomic layer etch precision is reviewed in detail for a variety of material sets and implementation methods. For a cyclic approach most similar to a reverse ALD scheme, the process window to achieve a truly self-limited atomic layer etch process is identified and the limitations as a function of controlling the adsorption step, the irradiation energy, and the reaction process are examined. Alternative approaches, including processes to enable pseudo-ALE precision, are then introduced and results from their application investigated. While these new plasma-enhanced atomic layer etch (PE-ALE) processes show encouraging results, most patterning applications are best realized by optimizations through discharge chemistry and/or plasma parameters. Significant improvements however were obtained when applying PE-ALE approaches to small pitch patterns. In particular the increased selectivity to OPL seems to offer a potential benefit for patterning high aspect ratio features.
Electrical Characterization of Postmetal Annealed Ultrathin TiN Gate Electrodes in Si MOS Capacitors
