A RISR architecture for Sigma-delta analog to digital converters with modified noise transfer function to obtain a better performance in terms of SNR is proposed. Cascading of two modified second order modulators are done to achieve 4th order modulator. Behavioral simulations are done to study the performance of feed-forward and the modified cascaded architecture. They are designed to operate at 1.28MHz clock frequency for audio applications (OSR of 32). It is noted that SNR of 115dB is achieved by cascading of two Modified second order RISR architectures which is 8dB more than the normal RISR architecture.
Time‐interleaving design of error‐feedback sigma‐delta modulators with infinite impulse response noise transfer function
