High-speed dual-modulus prescaler architecture for programmable digital frequency dividers

2001 ◽  
Vol 37 (24) ◽  
pp. 1433 ◽  
Author(s):  
É. Tournier ◽  
M. Sié ◽  
J. Graffeuil
Keyword(s):  
High Speed ◽  
Frequency Dividers ◽  
Digital Frequency

High-speed frequency dividers using GaAs/GaAlAs high-electron-mobility transistors

1984 ◽  
Vol 20 (5) ◽  
pp. 217 ◽  
Author(s):  
C.P. Lee ◽  
S.J. Lee ◽  
D. Hou ◽  
D.L. Miller ◽  
R.J. Anderson ◽  
...  
Keyword(s):  
Electron Mobility ◽  
High Speed ◽  
High Electron Mobility Transistors ◽  
High Electron ◽  
High Electron Mobility ◽  
Electron Mobility Transistors ◽  
Frequency Dividers

scholarly journals Hardware Implementation of 32-Bit High-Speed Direct Digital Frequency Synthesizer

2014 ◽  
Vol 2014 ◽  
pp. 1-9 ◽  
Author(s):  
Salah Hasan Ibrahim ◽  
Sawal Hamid Md. Ali ◽  
Md. Shabiul Islam
Keyword(s):  
High Speed ◽  
Frequency Synthesizer ◽  
Logic Gates ◽  
Sine Wave ◽  
Lookup Table ◽  
Frequency Resolution ◽  
Digital Frequency ◽  
Quarter Wave ◽  
Direct Digital Frequency Synthesizer ◽  
Gated Clock

The design and implementation of a high-speed direct digital frequency synthesizer are presented. A modified Brent-Kung parallel adder is combined with pipelining technique to improve the speed of the system. A gated clock technique is proposed to reduce the number of registers in the phase accumulator design. The quarter wave symmetry technique is used to store only one quarter of the sine wave. The ROM lookup table (LUT) is partitioned into three 4-bit sub-ROMs based on angular decomposition technique and trigonometric identity. Exploiting the advantages of sine-cosine symmetrical attributes together with XOR logic gates, one sub-ROM block can be removed from the design. These techniques, compressed the ROM into 368 bits. The ROM compressed ratio is 534.2 : 1, with only two adders, two multipliers, and XOR-gates with high frequency resolution of 0.029 Hz. These techniques make the direct digital frequency synthesizer an attractive candidate for wireless communication applications.

High-Speed Digital Frequency Scanning Ion Trap Mass Spectrometry

2013 ◽  
Vol 85 (22) ◽  
pp. 10935-10940 ◽  
Author(s):  
Di Wang ◽  
Friso H. W. van Amerom ◽  
Theresa Evans-Nguyen
Keyword(s):  
Mass Spectrometry ◽  
High Speed ◽  
Ion Trap ◽  
Ion Trap Mass Spectrometry ◽  
Frequency Scanning ◽  
Digital Frequency

A high speed direct digital frequency synthesizer realized by a segmented nonlinear DAC

2009 ◽  
Vol 30 (9) ◽  
pp. 095003 ◽  
Author(s):  
Yuan Ling ◽  
Ni Weining ◽  
Hao Zhikun ◽  
Shi Yin ◽  
Li Wenchang
Keyword(s):  
High Speed ◽  
Frequency Synthesizer ◽  
Digital Frequency ◽  
Direct Digital Frequency Synthesizer ◽  
Nonlinear Dac
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